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Method and device for dynamically constructing software supernodes on array heterogeneous computing system

A computing system and super-node technology, applied to digital computer components, computing, computers, etc., can solve the problem of inflexible node expansion

Active Publication Date: 2021-02-19
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Based on this, it is necessary to address the above technical problems and provide a method, device, computer equipment and storage medium for dynamically constructing software supernodes on an array heterogeneous computing system that can solve the problem of inflexible node expansion

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  • Method and device for dynamically constructing software supernodes on array heterogeneous computing system
  • Method and device for dynamically constructing software supernodes on array heterogeneous computing system
  • Method and device for dynamically constructing software supernodes on array heterogeneous computing system

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Embodiment Construction

[0074] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

[0075] The method for dynamically constructing software supernodes on an array heterogeneous computing system provided by this application can be applied to the application environment as shown in the figure below. Design and construct an array heterogeneous computer system. At the hardware level, the accelerators are separately formed into an array. When a new accelerator is replaced or a new type of accelerator appears in the array, it is necessary to virtualize the separated hardware nodes into software supernodes at the software level.

[0076] In one embodiment, such ...

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Abstract

The present application relates to a method, a device, a computer device and a storage medium for dynamically constructing a software supernode on an array heterogeneous computing system. The method includes: starting a daemon process in the background of each physical node in the array heterogeneous computing system, and setting the host name, node identity, and daemon process name of each physical node through the supernode configuration process. Information such as process number and communication port address are exchanged inside the supernode, stored in the shared memory space under the daemon process, and the software supernode is constructed. After the software supernode is built, the supernode configuration process exits, and the daemon The process resides in the background and is responsible for managing the information inside the supernode. Through the method described in this application, when hardware nodes are added or decreased in the array heterogeneous computing system, corresponding software nodes can be dynamically constructed in the software supernode.

Description

technical field [0001] The present application relates to the field of heterogeneous computer technology, in particular to a method, device, computer equipment and storage medium for dynamically constructing software supernodes on an array heterogeneous computing system. Background technique [0002] Heterogeneous computing has been continuously developed in the field of high-performance computing due to its high performance and high energy efficiency, and more and more dedicated accelerators have emerged, such as GPU (Graphics Processing Unit, Graphics Processing Unit), FPGA (Field-programmable Gate Array , field programmable logic gate array), DSP (Digital Signal Processor, digital signal processor), AI (Artificial Intelligence, artificial intelligence) accelerator, etc. Usually, the accelerator is connected to the host-side CPU (Central Processing Unit, central processing unit) in the form of PCIe (Peripheral Component Interconnect Express, fast peripheral component inter...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/78
CPCG06F15/7807G06F15/7825
Inventor 卢凯杨灿群唐滔崔英博黄春彭林方建滨张鹏沈洁姜浩
Owner NAT UNIV OF DEFENSE TECH
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