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Test method and equipment of ASIC chip wafer and computer storage medium

An ASIC chip and testing method technology, applied in the field of electronics, can solve problems such as low test efficiency of batch ASIC chips, and achieve the effects of reducing testing land and testing labor costs, testing time, and quantity.

Active Publication Date: 2020-03-17
QINGDAO GOERTEK MICROELECTRONICS RES INST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The main purpose of the present invention is to provide a test method, equipment and computer storage medium for ASIC chip wafers, aiming to solve the technical problem of low test efficiency of current batches of ASIC chips

Method used

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  • Test method and equipment of ASIC chip wafer and computer storage medium
  • Test method and equipment of ASIC chip wafer and computer storage medium
  • Test method and equipment of ASIC chip wafer and computer storage medium

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Embodiment Construction

[0047] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0048] Such as figure 1 as shown, figure 1 It is the test equipment of the ASIC chip wafer of the hardware operating environment that the embodiment of the present invention scheme relates to (called the terminal again, wherein, the test equipment of the ASIC chip wafer can be made up of the test device of independent ASIC chip wafer, also can be It is formed by the combination of other devices and the testing device of ASIC chip wafer) Schematic diagram of the structure.

[0049]The terminal in the embodiment of the present invention can be a fixed terminal or a mobile terminal, such as an intelligent air conditioner with a networking function, an intelligent light, an intelligent power supply, an intelligent speaker, an automatic driving car, a PC (personal computer), a smart phone, a tablet computer , e-book read...

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PUM

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Abstract

The invention discloses a test method of an ASIC chip wafer. The test method of the ASIC chip wafer is applied to test equipment, and the test equipment is in communication connection with a test board. The test method comprises the following steps: when a chip test request is received, obtaining the test quantity corresponding to the chip test request, and connecting the ASIC chips of the test quantity to the test board; sending the on-off test signal to the ASIC chip through the initialized test board to obtain the on-off test data between the ASIC chip and the test board; if the on-off testdata is normal, sending the performance test signal to the ASIC chip through the test board to obtain performance test data of the ASIC chip; and analyzing the performance test data to obtain a testresult of the ASIC chip. The invention also discloses the test equipment of the ASIC chip wafer and a computer storage medium. The test efficiency of batch ASIC chips is improved.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a testing method, equipment and computer storage medium of an ASIC chip wafer. Background technique [0002] ASIC (Application Specific Integrated Circuit, integrated circuit) chip refers to an integrated circuit chip designed and manufactured in response to specific user requirements and the needs of specific electronic systems. [0003] The characteristic of ASIC chips is to meet the needs of specific users. When the ASIC chip is designed and formed, it is necessary to determine whether the ASIC chip is the same as the one designed on the FPGA (Field-Programmable Gate Array, Field Programmable Gate Array). Test, the current test equipment determines the test signal according to the ASIC chip information and sends the test signal to the ASIC chip for ASIC chip wafer testing. This test method is only suitable for testing a small number of ASIC chips. If you need to test a bat...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
CPCG01R31/2851G01R31/2853
Inventor 宋友奎陈建超卞洛珍刘栋星
Owner QINGDAO GOERTEK MICROELECTRONICS RES INST CO LTD
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