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Superjunction and method of making the same

A manufacturing method and super junction technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as easy damage, device failure, process instability, etc., achieve fast production rate, improve product production efficiency, and improve shock Effect of breakdown voltage and in-plane uniformity of breakdown voltage

Active Publication Date: 2022-03-08
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] However, due to the large number of oxide layer wet etching steps in the subsequent process after the formation of the super junction, the oxide layer 106 filled in the V-shaped port 105 is easily damaged, resulting in process instability and even directly leading to device failure.

Method used

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  • Superjunction and method of making the same

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Embodiment Construction

[0052] Such as figure 2 Shown is a schematic diagram of the device structure of the super junction of the embodiment of the present invention; the super junction of the embodiment of the present invention includes:

[0053] A plurality of trenches 3 are formed in the first epitaxial layer 2 of the first conductivity type, and the first epitaxial layer 2 is formed on the surface of the semiconductor substrate 1 .

[0054] A second epitaxial layer 4 of the second conductivity type is formed on the bottom surface and side surfaces of the trench 3, the second epitaxial layer 4 does not completely fill the trench 3 and surrounds the trench 3 V-shaped opening 5.

[0055] The V-shaped opening 5 is filled with a first dielectric layer 6 and a non-doped semiconductor layer 7, the non-doped semiconductor layer 7 is located on the top of the first dielectric layer 6, and the non-doped semiconductor layer 7 and the second epitaxial layer 4 enclose the first dielectric layer 6 inside to...

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Abstract

The invention discloses a super junction, comprising: a trench formed in a first epitaxial layer of a first conductivity type, a second epitaxial layer of a second conductivity type is formed in the trench, and the second epitaxial layer does not connect the trench The groove is completely filled and forms a V-shaped opening in the trench; the V-shaped opening is filled with a first dielectric layer and a non-doped semiconductor layer, and the non-doped semiconductor layer is located on the top of the first dielectric layer and the first dielectric layer Closed inside; the second conductivity type columns are composed of the second epitaxial layer filled in the trenches, the first conductivity type columns are composed of the first epitaxial layer between the trenches, and the first and second conductivity type columns are alternately arranged form a super knot. The invention also discloses a manufacturing method of the super junction. The present invention can adopt the structure of epitaxial layer plus dielectric layer to fill the trench, thereby improving the breakdown voltage of the device and the in-plane uniformity of the breakdown voltage, and at the same time avoiding the damage of the dielectric layer in the trench and the resulting process Instability and device failure problems.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor integrated circuits, in particular to a super junction; the invention also relates to a method for manufacturing the super junction. Background technique [0002] The super junction is composed of alternately arranged P-type thin layers (also called P-type pillars) and N-type thin layers (also called N-type pillars) formed in a semiconductor substrate, and the matching is completed by using P-type thin layers and N-type thin layers The formed depletion layer supports the reverse withstand voltage while maintaining a small on-resistance. [0003] The pillar structure of the PN interval of the super junction is the biggest feature of the super junction. Currently, there are mainly two methods for manufacturing the pillar structure of the PN spacer, one is obtained by multiple epitaxy and ion implantation, and the other is made by deep trench etching and epitaxy (EPI) filling. The latter ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06
CPCH01L29/0634
Inventor 李昊陆怡
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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