Capacitor array switching method applied to low-voltage SAR ADC

Abstract

The invention discloses a capacitor array switching method applied to a low-voltage SAR ADC. An analog-to-digital converter based on the method comprises two N-bit sub analog-to-digital converters with the same structure, the method comprises the following steps: for the input signals VIP and VIN, after N comparisons, obtaining N-bit digital output codes, which are divided into a sampling stage and a conversion stage, wherein, in the sampling stage, the input signals VIP and VIN are respectively connected to top polar plates of an upper capacitor array and a lower capacitor array through sampling switches, and bottom polar plates of all capacitors of the upper capacitor array and bottom polar plates of all capacitors of the lower capacitor array are connected to corresponding voltages; and, in the conversion stage, the comparator performs MSB bit-to-LSB bit comparison on the voltages of the top polar plates of the upper and lower capacitor arrays to obtain corresponding digital codes,and the connection relationship of the capacitor bottom polar plates in the upper and lower capacitor arrays are controlled according to the digital codes, and the N-bit digital output codes are obtained through N times of comparison. According to the invention, the power consumption of the DAC part in the conversion process can be greatly reduced, only two reference levels are adopted, and the method is suitable for the design under the near threshold voltage.

Description

Technical field [0001] The invention relates to a capacitor array switching method applied to a low-voltage SAR ADC, and belongs to the technical field of the capacitive DAC of the SAR ADC. Background technique [0002] Because most of its circuits are composed of digital circuits and there is no operational amplifier, SAR ADC has high energy efficiency and is compatible with advanced technology. Medium precision (8-12 bits), medium sampling rate ( <1MHz) SAR ADCs are widely used in biomedical electronics, wearable devices, implantable devices, portable devices, and wireless sensor network nodes. The power consumption of SAR ADC mainly comes from the capacitance DAC, comparator and digital control logic. At low speed, the switching power consumption of the capacitance DAC occupies a large proportion of the overall power consumption. [0003] In the existing research, a variety of switching algorithms have been proposed to reduce the switching power consumption of the capacitor ...

AI Technical Summary

Problems solved by technology

But this makes the ADC additionally add a third-level reference buffer circuit, which increases the power consumption of this part of the circuit

Moreover, under low power consumption design, the power supply voltage is often very low, and third-level generation and high-quality transmission are very difficult to do, so the introduction of the third level seems to outweigh the gain.

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