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Parallel Data Acquisition Circuit and Automatic Acquisition Method of Multiple Revolving Transformers

A data acquisition circuit, resolver technology, applied in the direction of analog-to-digital converter, electrical digital data processing, data processing input/output process, etc., can solve the problem of slow data transmission speed of circuits and methods, and achieve automatic switching of acquisition channels. , Realize the effect of signal amplification adjustment and circuit structure modularization

Active Publication Date: 2022-04-12
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a parallel data acquisition circuit and automatic acquisition method for multiple rotary transformers, so as to solve the problem of slow data transmission speed in the circuit and mode of serial data output for simultaneously collecting data output of multiple rotary transformers

Method used

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  • Parallel Data Acquisition Circuit and Automatic Acquisition Method of Multiple Revolving Transformers
  • Parallel Data Acquisition Circuit and Automatic Acquisition Method of Multiple Revolving Transformers
  • Parallel Data Acquisition Circuit and Automatic Acquisition Method of Multiple Revolving Transformers

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specific Embodiment approach 1

[0015] Specific implementation mode one: combine figure 1 Describe this embodiment, the parallel data acquisition circuit of this embodiment comprises four excitation power supplies 1, four rotary transformers 2, four differential filter circuits 3, four AD2S80A chips 4 and a field programmable gate array FPGA;

[0016] Excitation power supply 1: each excitation power supply 1 is connected to an excitation winding of a rotary transformer 2 to provide excitation current, and each excitation power supply 1 is connected to an AD2S80A chip 4 to provide it with working power;

[0017] Resolver 2: each resolver 2 includes an excitation winding, an iron core and two induction windings;

[0018] Differential filter circuit 3: the two input terminals of the sinusoidal differential signal of each differential filter circuit 3 are connected to the two ends of an induction winding of the rotary transformer 2, and the input signal is differentially calculated and filtered and output; each ...

specific Embodiment approach 2

[0023] Specific implementation mode two: combination figure 2This embodiment will be described. This embodiment is further limited to the embodiment as follows: AD2S80A’s analog / digital conversion data output is indicated by the BUSY signal. When the BUSY signal is at a high level, it means that the AD2S80A is converting the angle information of the resolver. When the BUSY signal is at a low level, Indicates that the conversion is complete and the data can be read; the ENABLE signal of the FPGA controls the output of the parallel conversion data. When the ENABLE signal is high, the parallel data bus is in a high-impedance state; when the ENABLE signal is low, the parallel data bus is valid. Therefore, through the BUSY signal indication of the four modules, the working status of the modules can be confirmed, and the data output of each module can be realized by controlling the ENABLE signal.

specific Embodiment approach 3

[0024] Specific implementation mode three: combination image 3 This embodiment will be described. Compared with the embodiment, this embodiment is further limited in that: the collection and processing module of this embodiment is implemented based on FPGA. FPGA has parallel data processing function, which can realize parallel data processing with four modules AD2S80A, and meet the requirements of fast and real-time data. In order to prevent false triggering caused by signal interference, a digital filter is added to each BUSY signal, and then the BUSY signals output by 4 modules are encoded, and there are 16 states in total. In order to prevent parallel data bus conflicts, it is necessary to control each data read in the FPGA program, and only the ENABLE signal of one module channel is valid. In order to realize the automatic collection of data, according to the 16 states encoded by the BUSY signal, the ENABLE signal is targetedly controlled. When one channel is valid, the ...

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Abstract

The invention relates to a parallel data acquisition circuit and an automatic acquisition method of multiple rotary transformers, which relate to an acquisition circuit for data output of multiple rotary transformers and an automatic acquisition method for data output. Solve the problem that the data transmission speed is slow when the data output of multiple rotary transformers is collected at the same time and the serial data output is adopted. The acquisition circuit includes multiple excitation power supplies, multiple rotary transformers, multiple differential filter circuits, multiple AD2S80A chips and a field programmable gate array; the 16-bit parallel output data of AD2S80A is hung on the same data bus, connected to the field programmable gate array. On the IO pin of the programming logic device FPGA, the BUSY and ENABLE signals related to each AD2S80A are automatically collected and switched to realize the 16-bit parallel data information collection of multiple independent resolvers. This method is widely used in multi- Shaft sensor systems and multi-channel parallel data conversion fields that require fast acquisition.

Description

technical field [0001] The invention relates to a collection circuit for data output of multiple rotary transformers, and also relates to an automatic collection method for data output of multiple rotary transformers. Background technique [0002] The driving and control performance of the robot determines the operation and control performance of the robot. With the constraints on the power consumption, volume and cost of the robot system, the multi-axis driving and control integration technology of the robot has become an important direction for the development of robots. The data output of multiple resolvers can provide absolute angle information and speed information for joint motors and realize vector control of the motors. It is the core unit for realizing a resolver-based robot multi-axis servo control system. In addition, the absolute position information of the motor end provided helps the robot realize position control, compliance control and force control in Cartes...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/05H03M1/12
Inventor 倪风雷郭闯强金明河刘宏
Owner HARBIN INST OF TECH
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