A Time Acquisition Method with Adjustable Precision Based on Second Pulse

Abstract

A method for obtaining time with adjustable precision based on second pulses is provided, wherein: the PPC processor receives the UTC time information sent by the GPS receiver, and obtains the hour, minute, and second data synchronized with the GPS after solving; the PPC processor Generate accuracy information, and pass the data and accuracy information obtained after the calculation to the FPGA clock acquisition unit; the FPGA clock acquisition unit receives the local clock signal from the local clock source and the PPS signal from the GPS receiver. Calibrate the received data of hours, minutes, seconds and seconds; the FPGA clock acquisition unit sends the calibrated data of hours, minutes, seconds and seconds back to the PPC processor through the LBC bus to realize the calibration of data below seconds. The time precision configuration of this method is flexible, and the acquisition time precision is high.

Description

technical field [0001] The invention relates to the technical field of clock synchronization of aviation equipment systems, in particular to a method for acquiring time with adjustable precision based on second pulses. Background technique [0002] System time synchronization between aviation airborne equipment is particularly important, and system time synchronization is the basis for ensuring normal communication and collaborative work between equipment. In the whole system, the device terminal can obtain a high-precision clock by receiving GPS signals or B codes, and use this clock as a reference to serve time to other devices. Although the accuracy of the UTC time frame output by the terminal in RS422 format can reach 1us or even higher, due to the serial-to-parallel conversion delay inside the terminal, the transmission delay of the data line, and the serial-to-parallel conversion delay of the time-service device, the time-service device can obtain The UTC time is not ...

AI Technical Summary

Problems solved by technology

However, this technology has the problem of being unable to flexibly adjust the precision of the clock below the second

In this technology, FPGA designers set a fixed clock accuracy of less than one second according to the actual use requirements of the timing equipment, and the accuracy cannot be adjusted during use.

When the time service equipment needs to use higher precision time due to changes in requirements, FPGA designers need to redesign the logic circuit according to the new requirements, which brings great inconvenience to the upgrade and expansion of the time service equipment functions

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