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A pre-compression method and system for integrated circuit layout planning

An integrated circuit and pre-compression technology, which is applied in the fields of electrical digital data processing, instruments, computing, etc., can solve problems such as increasing production costs, reducing work efficiency, and increasing circuit layout area, so as to reduce production costs and improve utilization. Effect

Active Publication Date: 2022-07-26
FOSHAN SHUNDE SUN YAT SEN UNIV RES INST +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The current method adopts the random initialization method, randomly arranges the sequence composed of module numbers, and obtains the sequence pair and However, this method has obvious disadvantages, such as Figure 8 As shown, the corresponding circuit modules of the random initialization sequence are very scattered, and most of the modules are located outside the preset layout box, so it takes more time to fill these blank areas in the later optimization algorithm, which reduces the workload. Efficiency, there is a wide range of blank areas, which will also increase the area of ​​the circuit layout and increase the production cost

Method used

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  • A pre-compression method and system for integrated circuit layout planning
  • A pre-compression method and system for integrated circuit layout planning
  • A pre-compression method and system for integrated circuit layout planning

Examples

Experimental program
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Effect test

Embodiment 1

[0054] like figure 1 As shown, a pre-compression method for integrated circuit layout planning includes the following steps:

[0055] A1. Acquire preset array information, sequence pair information about the relationship between multiple modules including an integrated circuit, and parameter information of each module. The parameter information is length information, width information, area information and type information of the module.

[0056] A2. After arranging each module in the preset layout frame by combining the sequence pair information and the array information in turn, combine the parameter information and the preset judgment method to determine whether there is an occlusion module. If there is, use the first method to update the array information; otherwise , using the second method to update the array information. The array information includes parameter information of the left border of the layout frame, parameter information of the lower border of the layout...

specific Embodiment 1

[0073] Combine below Figure 2 to Figure 14 The above method is explained in detail.

[0074] Assuming that the integrated circuit contains six modules, the numbers of the six modules are respectively abcdef, and their sizes are shown in Table 1.

[0075] Table 1

[0076] module a module b module c module d module e module f width 8 6 3 5 7 3 high 4 3 5 5 6 7

[0077] Also assume that the sequence pairs for this circuit layout are as follows.

[0078]

[0079] Set an array en, which stores: the left border of the circuit layout box, represented by the letter l; the lower border of the circuit layout box, represented by the letter s; and the number of the module.

[0080] First, put l and s in the positive sequence respectively the beginning and end of the

[0081] The first module in the reverse sequence is module d, and the sequence pair is According to the sequence pair properties, module d will be located in X 1 ...

Embodiment 2

[0099] A pre-compression system for integrated circuit layout planning, comprising:

[0100] a memory for storing at least one program;

[0101] The processor is configured to load the at least one program to execute the pre-compression method for layout planning of an integrated circuit described in any one of the above.

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Abstract

The invention discloses a pre-compression method and system for layout planning of an integrated circuit, wherein the method includes the following steps: acquiring array information, sequence pair information of the mutual relationship between multiple modules including the integrated circuit, and parameter information of each module ; After arranging each module in the layout frame by combining sequence pair information and array information in turn, combine parameter information and preset judgment method to determine whether there is an occlusion module, if there is, use the first method to update the array information; otherwise, use the second method The array information is updated by the method; according to the sequence pair information, it is judged whether all the modules have been laid out, if so, the pre-compression is completed; otherwise, continue to the previous step. The present invention improves the work efficiency and the utilization rate of the layout area and reduces the production cost by judging whether there is an occlusion module, and updating the array information when the occlusion module exists, and then combining the sequence pair information and the array information to arrange the next module. , which can be widely used in the field of integrated circuit physical design.

Description

technical field [0001] The invention relates to the field of integrated circuit physical design, in particular to a pre-compression method and system for integrated circuit layout planning. Background technique [0002] At present, the design of large-scale integrated circuits must rely on computer-aided design tools, so the efficiency of the tools has a great impact on the design time of the circuit. At present, the physical design of integrated circuits mainly includes two parts: layout representation and optimization algorithm. The computer uses the layout representation to first convert the actual circuit into a coding form that can handle it, and then uses a specific optimization algorithm to perform optimization on each module in the circuit. Layout to obtain circuit block layout with smaller area and other specific specifications. [0003] At present, the sequence pair notation is mainly used to represent the distribution of modules in an integrated circuit (circuit ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/398G06F30/392
CPCG06F30/392
Inventor 谭洪舟梁耀淦谢舜道陈荣军朱雄泳曾衍瀚路崇
Owner FOSHAN SHUNDE SUN YAT SEN UNIV RES INST
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