Design method of integrated compensation digital filter
A filter design and digital compensation technology, applied in the direction of digital technology network, impedance network, electrical components, etc., to simplify the implementation structure, enhance the versatility of the system, and reduce the design complexity.
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[0095] Assume that the system clock f_clk=83.961MHz, the system symbol rate f_symbol1=1.573632Msps and f_symbol2=3.147264Msps, the sampling factor N=4, and the shaping factor α=0.35.
[0096] The specific steps of adopting the present invention to carry out integrated compensation digital filter design are as follows:
[0097] (1) Complete the design of filter coefficients with the help of MATLAB's FDATOOL tool:
[0098] Step 1: First, the root raised cosine filter is used as the filter mode, and the shaping coefficient is set to 0.35.
[0099] Step 2: Calculate the input sampling rate of the filter. According to the relationship between the symbol rate f_symbol1=1.573632Msps and f_symbol2=3.147264Msps of the system, and the system clock f_clk=83.961MHz, determine the value of the accurate variable rate factor P / Q to be 32 / 427 (for f_symbol1) and 64 / 427 (for f_symbol2). Choose a smaller interpolation factor Pmin=32. Then the sampling rate of the interpolated data entering...
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