Bidirectional buffer circuit for two-wire serial interface

Abstract

The invention discloses a bidirectional buffer circuit for two-wire serial interfaces, and relates to the field of analog integrated circuit design. The bidirectional buffer circuit comprises a bus master, a bus slave and a bidirectional buffer, wherein the bus master comprises a master data bus SDAM which is connected with a power supply VDM through a pull-up resistor RM and grounded through a stray capacitor CM; the bus slave comprises a slave data bus SDAS which is connected with the power supply VDS through a pull-up resistor RS and grounded through a stray capacitor CS; the bidirectionalbuffer comprises a buffer BUF1, a BUF2 and a switch signal CNCT; both output of the buffer BUF2 and input of the buffer BUF1 are connected with the master data bus SDAM when being connected with eachother; both output of the buffer BUF1 and input of the buffer BU2 are connected with the slave data bus SDAS when being connected with each other; and the switch signal CNCT is used for controlling the opening and closing of the buffer BUF1 and the buffer BUF2. According to the bidirectional buffer circuit, when bus wiring distances are relatively long or slaves connected on buses are too many, the bus signal quality is not influenced.

Description

technical field [0001] The invention relates to the field of analog integrated circuit design, in particular to a bidirectional buffer circuit for a two-wire serial interface. Background technique [0002] Two-wire serial interface technology widely exists in various communication electronic design instruments and equipment, the most common two-wire serial interface technologies are I2C, SMBUS, SPI, etc. A common feature of these two-wire serial interfaces is the bus connection, that is, there is usually one master and multiple slaves on a two-wire serial bus. [0003] for example figure 1 A typical application schematic of a two-wire serial bus is shown. In the bus, SCL represents the clock signal, and SDA represents the data signal. SCL and SDA are two-way communication buses. At a certain moment, the bus will only be occupied by a certain master or a certain slave. SCL and SDA may be driven by the master or driven by the slave. Variety. When the bus is driven, it is ...

AI Technical Summary

Problems solved by technology

[0005] (1) When the wiring distance of the bus is long, the parasitic capacitance of the line will increase significantly, seriously affecting the signal quality of the bus;

[0006] (2) When there are too many slaves connected to the bus, the parasitic capacitance of the line will also increase, which will affect the signal quality of the bus;

[0008] when figure 2 When the switch shown is turned off, the parasitic capacitance CS between the slave connected to the switch on the bus is also isolated at the same time, which will not affect the connection between SDAM and other slaves; but when the switch is turned on, the total capacitance of the bus will still be changed from CM increased to CM+CS

When multiple switches are turned on at the same time, the bus parasitic capacitance of multiple slaves will be added, which will affect the signal quality of the bus.

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