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Real-time implementation of low-light video inter-frame accumulative noise reduction algorithm based on FPGA

An implementation method and video frame technology, applied in television, computing, color television, etc., to achieve the effect of reducing clock frequency requirements and storage device capacity requirements

Active Publication Date: 2021-04-27
NANJING UNIV OF SCI & TECH
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  • Description
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Problems solved by technology

These two points limit the application of multi-frame accumulation in actual engineering

Method used

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  • Real-time implementation of low-light video inter-frame accumulative noise reduction algorithm based on FPGA
  • Real-time implementation of low-light video inter-frame accumulative noise reduction algorithm based on FPGA
  • Real-time implementation of low-light video inter-frame accumulative noise reduction algorithm based on FPGA

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Embodiment Construction

[0014] The purpose of the present invention is to provide a real-time display method for multi-frame accumulated low-light video denoising under the condition that memory storage capacity and clock frequency are relatively scarce. The operation is performed by calculating and storing the difference between the gray value of the corresponding pixel of the multi-frame image and the corresponding pixel of the current frame, using the maximum operable bit width of the storage device, and assigning different bits according to the time distance from the current frame Wide to store the difference between the gray value of the same pixel as the current frame, which saves storage space and reduces the impact on the filtering effect, and finally achieves accumulation under the condition of a small capacity storage space of 13.27Mb and a lower clock frequency of 27MHz Inter-frame accumulative filter noise reduction with 8 frames.

[0015] The operation is performed by calculating and sto...

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Abstract

The invention discloses a real-time realization method of an FPGA-based accumulative noise reduction algorithm between low-light video frames. Calculate and store the difference between the gray value of the corresponding pixel of the multi-frame image and the corresponding pixel of the current frame. According to the time distance from the current frame, different bit widths are allocated to store the difference between the gray value of the same pixel as the current frame. When outputting, each pixel clock gets two 16-bit data with a total of 32 bits, including the latest 8-bit frame. The pixel grayscale data and the 7 grayscale difference information stored by the remaining 24 bits are calculated to obtain the grayscale information output after the cumulative average of 8 frames. The invention reduces the capacity requirement of the required storage device, and also reduces the requirement of the clock frequency of the storage device required by the multi-frame accumulation algorithm.

Description

technical field [0001] The invention belongs to the field of low-light imaging denoising, in particular to a method for realizing cumulative denoising of multiple frames by using a storage device with low speed and less storage space. Background technique [0002] In recent years, with the development of science and technology, low-light night vision technology has made great progress. Low-light night vision technology is to obtain the image information of the target scene under the weak light at night. Photons are converted into electrons through the photoelectric effect of the photocathode. An optical image visible to the human eye. Obtaining clearer and more accurate images has become an important research direction. Under this current situation, low-light imaging technology has gradually become a military-civilian dual-use technology that the country is vigorously developing. [0003] The main disadvantage of low-light images is that random noise is serious. The distr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T5/00H04N5/21
CPCH04N5/21G06T5/70
Inventor 钱芸生王逸伦周晓瑜唐小东沈家炜倪苏涵
Owner NANJING UNIV OF SCI & TECH
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