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Method and device for load balancing of parallel discrete event simulation, medium and computer equipment

A technology for simulating load and discrete events, applied in the computer field, can solve the problems of poor load balancing effect and low simulation operation efficiency, and achieve the effect of good load balancing effect and improving simulation operation efficiency.

Active Publication Date: 2018-02-23
NAT UNIV OF DEFENSE TECH
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Problems solved by technology

[0005] Based on this, it is necessary to provide a parallel discrete event simulation load balancing method, device, and medium that can optimize the load balancing effect and improve the simulation operation efficiency for the problems of poor load balancing effect and low simulation operation efficiency of traditional parallel discrete event simulation. and computer equipment

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  • Method and device for load balancing of parallel discrete event simulation, medium and computer equipment
  • Method and device for load balancing of parallel discrete event simulation, medium and computer equipment
  • Method and device for load balancing of parallel discrete event simulation, medium and computer equipment

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Embodiment Construction

[0029] refer to figure 1 , in one embodiment, provide a kind of parallel discrete event simulation load balancing method, comprise the steps:

[0030] S110: Perform simulation operation initialization on multiple logical processes, obtain multiple groups of logical processes and schedulers corresponding to each group, and record the total number of logical processes.

[0031] The initialization of the simulation run of the logic process is the preparation for the simulation. The operation of simulation operation initialization includes grouping logical processes and creating schedulers, and obtaining multiple groups and corresponding schedulers for each group. A plurality of logical processes refers to two or more logical processes, and a plurality of groups refers to two or more groups; a group correspondingly includes one or more logical processes. Wherein, the scheduler is used to select a suitable logical process and make the selected logical process complete its own sim...

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Abstract

The invention relates to a method and a device for load balancing of parallel discrete event simulation, a medium and computer equipment. The method comprises the following steps of initiating simulation running on a plurality of logic progresses, obtaining groups and dispatchers corresponding to the groups, and recording the total number of logic progresses; in the simulation running period, obtaining the stealing number of the logic progresses in the current simulation cycle, and judging whether the load is out of balance or not according to the obtained stealing number of the logic progresses, stealing number of the logic progresses in the existing simulation progress, total number and preset threshold value; when the load is not out of balance, calling each dispatcher to perform simulation advancing on the advanced logic progresses in the corresponding group; when the group not executing the simulation advancing on all logic progresses exists, calling the executed dispatcher to steal the logic progresses from the unexecuted group, and performing simulation advancing; when the load is out of balance, rebalancing the load according to the obtained prediction workload and the prediction total workload of each group, and calling each dispatcher to perform simulation advancing on the advanced logic progresses in the corresponding group. The method has the advantage that the simulation running efficiency can be improved.

Description

technical field [0001] The invention relates to the field of computer technology, in particular to a parallel discrete event simulation load balancing method, device, medium and computer equipment. Background technique [0002] The simulation of discrete events is widely used in the research of complex systems, such as traffic systems, biological systems and military systems, and the simulation methods include serial simulation and parallel simulation. On the one hand, as the complexity of the model and the scale of the system continue to increase, serial simulation is difficult to effectively support the operation of simulation applications; on the other hand, with the wide application of multi-core processors, many research work based on A many-core platform for building parallel discrete-event simulations. Due to the advantages of shared memory address, small communication and synchronization overhead, most of them implement parallel discrete event simulation on multi / ma...

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Application Information

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IPC IPC(8): G06F9/50
CPCG06F9/505
Inventor 唐文杰姚益平朱峰姚锋李田林张孟曲庆军
Owner NAT UNIV OF DEFENSE TECH
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