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The method of adjusting the pcie Tx Eq on the CPU side of the purley platform based on cscripts

A platform and pre-adjustment technology, applied in the direction of instrumentation, computing, electrical digital data processing, etc., can solve the problems of occupying test engineers, long time, low inspection efficiency, etc., and achieve the effect of improving test efficiency

Active Publication Date: 2020-09-22
INSPUR SUZHOU INTELLIGENT TECH CO LTD
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  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0003] Since it is necessary to start up and enter the BIOS interface for setting, and to make the set parameter values ​​take effect, the system needs to be restarted. This process takes a long time. When it is necessary to adjust and test various Tx Eq parameters, it will take up a lot of time for the test engineer. , the inspection efficiency is low

Method used

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  • The method of adjusting the pcie Tx Eq on the CPU side of the purley platform based on cscripts
  • The method of adjusting the pcie Tx Eq on the CPU side of the purley platform based on cscripts
  • The method of adjusting the pcie Tx Eq on the CPU side of the purley platform based on cscripts

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Embodiment Construction

[0026] like figure 2 As shown, a method for adjusting the PCIe Tx Eq on the CPU side of the Purley platform based on CScripts includes the following steps: S1. Before adjusting the Tx Eq, the CPU needs to be halted first, so that the CPU only responds to commands that modify the Tx Eq parameters, and does not perform Other computing operations; S2. Confirm the status of all lanes of the current CPU uniPhy, such as image 3 As shown, determine whether the PCIe port to be adjusted is in the L0 state, yes, confirm the status of all lanes of the port; no, adjust or restart the machine in the BIOS; S3, confirm the current PCIe topology, and confirm the status of the PCIe port to be adjusted port number; S4. Adjust the Tx Eq of the corresponding PCIe port; S5. Determine whether the parameter modification is valid. If the modification is invalid, determine whether the current PCIe port is in the Gen3 state. If the current PCIe port is in the Gen3 state, restart Execute from step S1...

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Abstract

The invention discloses a CScripts-based method for adjusting PCIe Tx Eq at the CPU end of a Purley platform. The PCIe Tx Eq at the CPU end of the Purley platform is changed through CScripts, and Eq parameter confirmation is carried out after the changing is completed. If the PCIe chain path is reduced to Gen1 after the changing is completed, a corresponding chain path is subjected to retraining back to Gen3 through a PCIe Port method corresponding to re-enable, and then the condition whether Eq parameter modification is effective or not is confirmed again. According to the method, after Tx Eq parameter is modified, relevant testing can be carried out instantly, and the system does not need to be restarted, so that the testing time can be greatly shortened.

Description

technical field [0001] The invention relates to a method for adjusting PCIe Tx Eq at the CPU end of a Purley platform based on CScripts. Background technique [0002] Since the rate of PCIE 3.0 has reached 8Gb / s, and the transmission channel often needs to pass through the motherboard to the board, the entire link will be relatively long, which will cause relatively large loss of high-speed signals. In order to compensate the loss of the channel and ensure that the signal eye diagram at the receiving end can be opened, it is very necessary to use corresponding emphasis (de-emphasis or pre-emphasis) and equalization techniques. Therefore, PCIE 3.0 uses de-emphasis and preshoot functions on the sending side. In fact, the de-emphasis and preshoot functions of PCIE 3.0 are implemented through a third-order FIR filter. like figure 1 As shown, among them: the three parameter values ​​of C-1, C0 and C+1 are what we call the Tx Eq value. The existing solution is adjusted by modi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/4401G06F13/42
CPCG06F9/4411G06F13/4221G06F2213/0026
Inventor 王鹏
Owner INSPUR SUZHOU INTELLIGENT TECH CO LTD
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