Array substrate, driving method thereof, organic light-emitting display panel, and display device
A technology for array substrates and light-emitting devices, applied in static indicators, instruments, etc., can solve the problems of abnormal display, influence on display stability, drift of driving transistor characteristics, etc., and achieve the effect of improving stability
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Embodiment 1
[0124] Figure 5a Each pixel unit 40 includes a pixel compensation circuit and a voltage control circuit, that is, each pixel unit 40 includes 3 transistors and 2 capacitors. To Figure 5a The structure of the circuit in the pixel unit 40 on the left side of the array substrate shown as an example is combined with Figure 7a The timing diagram is shown for explanation. Specifically, select such as Figure 7a The shown input timing diagram has four stages: initialization stage T1, threshold compensation stage T2, data writing stage T3, and light-emitting stage T4. Among them, in the initialization phase T1 and the threshold compensation phase T2, the voltage of the signal output by the data signal terminal Data is V in , The V in Much smaller than the voltage V of the signal at the initialization signal terminal Vinit init , Namely V in init . The signal output by the data signal terminal Data at least during the data writing phase T3 is the specific gray-scale voltage V d...
Embodiment 2
[0136] Figure 5b The pixel compensation circuits in two adjacent pixel units 40 share a voltage control circuit, that is, each pixel unit 40 includes 2.5 transistors and 2 capacitors. Among them Figure 5b The structure of the circuit in the pixel unit 40 on the left and the pixel unit 40 on the right in the array substrate shown as an example is combined Figure 7a The timing diagram is shown for explanation. Specifically, select such as Figure 7a The shown input timing diagram has four stages: initialization stage T1, threshold compensation stage T2, data writing stage T3, and light-emitting stage T4. Among them, in the initialization phase T1 and the threshold compensation phase T2, the voltage of the signal output by the data signal terminal Data is V in , The V in Much smaller than the voltage V of the signal at the initialization signal terminal Vinit init , Namely V in init . The signal output by the data signal terminal Data at least during the data writing phase...
Embodiment 3
[0149] Figure 5c The pixel compensation circuits in all the pixel units 40 in the middle row share a voltage control circuit, that is, each pixel unit 40 includes 2 transistors and 2 capacitors respectively. Among them, only one row including two pixel units 40 is taken as an example, such as Figure 5c Shown, and with Figure 5c The structure of the circuit in the pixel unit 40 on the left and the pixel unit 40 on the right in the array substrate shown as an example is combined Figure 7a The timing diagram is shown for explanation. Specifically, select such as Figure 7a The shown input timing diagram has four stages: initialization stage T1, threshold compensation stage T2, data writing stage T3, and light-emitting stage T4. Among them, in the initialization phase T1 and the threshold compensation phase T2, the voltage of the signal output by the data signal terminal Data is V in , The V in Much smaller than the voltage V of the signal at the initialization signal terminal...
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