Receiving device and packet processing method thereof
A receiving device and packet technology, applied in electrical components, transmission systems, etc., can solve the problems of system memory space reduction and storage space consumption
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[0029] refer to figure 1 , figure 1 It is a system block diagram of the receiving device 10 provided by an embodiment of the present application. The receiving device 10 includes a packet parser 100 , a data storage 101 , a decryption unit 102 , a transmission engine 103 , a header processing unit 104 and a controller 105 . The data storage 101 is coupled to the packet parser 100 , the decryption unit 102 , the transmission engine 103 , the header processing unit 104 and the controller 105 . The decryption unit 102 is coupled to the transmission engine 103 , the header processing unit 104 and the controller 105 . The transfer engine 103 is coupled to the controller 105 and the system memory 11 . The header processing unit 104 is coupled to the controller 105 .
[0030] The receiving device 10 is installed in any communication device that supports the QUIC communication protocol. The receiving device 10 receives at least one segment data packet from another communication d...
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