Shifting register unit and shifting register
A shift register and reset unit technology, applied in static memory, digital memory information, instruments, etc., can solve the problems of display image quality, large delay of output pulse voltage signal, long time of output voltage signal drop, etc.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0049] figure 1 Schematic diagram of the structure of the shift register unit provided for the embodiment of the present invention, such as figure 1 As shown, the shift register unit provided by the embodiment of the present invention includes: a shift register module and a high voltage discharge module.
[0050] Wherein, the shift register module is connected to the signal input terminal INPUT, the first reset signal terminal TRST, the first low level terminal VSS, the high level terminal VDD, the first clock signal terminal CLKB and the second clock signal terminal CLK. The high-voltage discharge module is connected to the output terminal OUTC, the high-level terminal VDD, the signal input terminal INPUT, the first reset signal terminal TRST, the second reset signal terminal RST, the first low-level terminal VSS and the second low-level terminal of the shift register module. Flat end VGL.
[0051] It should be noted that the output end of the shift register unit is the out...
Embodiment 2
[0097] Based on the technical conception of the technical solution of embodiment one, Figure 7 Schematic diagram of the structure of the shift register provided for the embodiment of the present invention, such as Figure 7 As shown, the shift register provided in Embodiment 2 of the present invention includes a plurality of shift register units.
[0098] Wherein, except the first-stage shift register unit, the signal input end of each other shift register unit is connected to the current-stage output end of the adjacent upper-stage shift register unit; except the last-stage shift register unit, The output end of each other shift register unit at this stage is connected to the reset signal end of the upper shift register unit adjacent to it.
[0099] Specifically, the input terminal INPUT2 of the second shift register unit is connected to the output terminal OUTPUT1 of the first shift register unit, and the input terminal INPUT3 of the third shift register unit is connected ...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com