High density low voltage trench power MOS device and method of manufacturing same

Abstract

The invention relates to a high density low voltage trench power MOS device and a method of manufacturing the same. A bowl structure of a trench is formed by performing thermal oxidation (a thickness of 500A-5000A) to the upper part of the trench, and a dry general etching method of a high selection ratio (silicon dioxide: silicon) is also selected for etching only silicon under the premise of not etching silicon dioxide, so that the etching of a contact hole in a cellular region of a trench power MOS device is realized, also known as self-aligned etching of the contact hole. Meanwhile, the invention also achieves the etching of a lead-out hole in a terminal protection region of the device, without increasing apparent process steps. As is well known in the industry, for self-aligned etching, the registration deviation of lithography can be considered to be zero. In this way, in the current 8-inch fab lithography machine operation, the invention can greatly reduce the cellular width of a minimum cell of the cellular region from 0.9 <mu>m to 0.5 <mu>m, thus greatly improving the cellular density (an integration degree) and reducing the overall specific on-resistance.

Description

technical field [0001] The invention relates to a high-density low-voltage trench power MOS device and a manufacturing method thereof, belonging to the technical field of semiconductors. Background technique [0002] For existing trench power MOSFET devices, for products with a voltage between positive (negative) 8V-100V, because the application side mainly pursues low characteristic on-resistance, it is hoped that the design can increase the density of cells as much as possible to realise. Such as figure 1 As shown, it is a schematic structural diagram of a traditional low-voltage trench power MOS device, including N+ substrate 1', N- epitaxial layer 2', trench 3', gate oxide layer 7', conductive polysilicon 8', P-well Region 9', N+ source 10', dielectric layer 12', contact hole 15', source metal 17', gate metal 18', terminal stop ring metal 19' and back metal layer 20'. [0003] The traditional low-voltage trench power MOS device, the manufacturing method includes the f...

AI Technical Summary

Problems solved by technology

If you want to change this limitation, you need to purchase an extremely expensive lithography machine with higher precision, which will inevitably greatly increase the equipment cost of the 8-inch fab, and the cost will also increase significantly

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