A kind of programming test method of phase change memory

Abstract

The invention provides a programming test method for a phase change memory. The phase change memory comprises a transistor and a phase change memory resistor unit. A drain electrode of the transistor is electrically connected to the phase change memory resistor unit. The method comprises S1: applying direct current voltage to a grid electrode of the transistor to turn on the transistor and applying pulse voltage to a drain electrode of the transistor to operate the phase change memory, and S2: applying direct voltage VG to the grid electrode of the transistor to turn on the transistor, simultaneously, applying direct voltage DC to the drain electrode to perform reading operation and measuring the resistance of the phase change storage resistor unit. The method realizes the pressure drop of the drain electrode of the transistor so that the transistor has large load resistance, the current flows from the transistor to the phase change material layer, and the measurement of the resistance of the phase change storage resistor unit is realized.

Description

technical field [0001] The invention relates to the field of semiconductors, and in particular, the invention relates to a programming and testing method of a phase-change memory. Background technique [0002] With the development of information technology, especially the popularity of mobile phones and other portable electronic devices, the application of non-volatile memory chips has penetrated into all aspects of modern human life. Flash memory (Flash Memory), as a typical non-volatile memory, has made great progress in the past ten years, but after the semiconductor technology enters the 22nm node, the flash memory technology based on floating gate charge storage has encountered difficulties in size reduction. difficulty. At this time, PCRAM (Phase Change Random Access Memory) technology has great advantages over flash memory technology in many aspects such as cell area, read and write speed, read and write times, and data retention time. Wide range of applications. ...

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But the 1T1R test yield distribution chart shows that almost all data operations fail, even the output current of 1T is greater than 3mA

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