FPGA (Field Programmable Gate Array) heterogeneous accelerated computing device and system

Abstract

The invention discloses an FPGA (Field Programmable Gate Array) heterogeneous accelerated computing device and system. The device comprises an FPGA chip and a communication interface, wherein the FPGA chip comprises an SVD (Singular Value Decomposition) computing circuit for realizing an SVD algorithm; the communication interface is used for being connected with a host and performing data communication with the host; the FPGA chip is used for acquiring data to be computed sent by the host via the communication interface, computing the data to be computed by using the SVD computing circuit to obtain a corresponding computing result, and then returning the computing result to the host via the communication interface. SVD computation corresponding to the SVD algorithm is realized based on the FPGA chip, that is, SVD computation is realized based on an FPGA heterogeneous computing platform, and the FPGA heterogeneous computing platform has the characteristic of high-speed computation, so the realizing SVD computation based on the platform can greatly improve the speed of SVD computation and then improve the computing performance of the SVD computation to meet increasing data processing demands.

Description

technical field [0001] The present invention relates to the technical field of big data computing, and more specifically, relates to an FPGA heterogeneous accelerated computing device and system. Background technique [0002] Spark is a Hadoop MapReduce-like general-purpose parallel framework open sourced by UC Berkeley AMP lab. It is better suited for data mining and machine learning that require iterative MapReduce algorithms, and can be used to build large-scale, low-latency data analysis applications. [0003] Among them, MLlib is the machine learning library of Spark, and the singular value decomposition (Singular ValueDecomposition, SVD) algorithm is an important matrix decomposition algorithm in the machine learning library in big data processing, but the inventors have found that the calculation speed is relatively low when implementing the SVD algorithm based on Spark at present. Slow, its computing performance cannot meet the growing demand for data processing. ...

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a device and system for FPGA heterogeneous accelerated computing to solve the problem that its computing performance cannot meet the increasing data processing requirements when implementing the SVD algorithm based on Spark in the prior art

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