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Electronic package and fabrication method thereof

A technology for electronic packages and electronic components, which is applied in the manufacture of electrical components, electric solid devices, semiconductor/solid devices, etc., and can solve the problem of increasing the volume of semiconductor packages 1, increasing the surface area of ​​substrates 10, and not conforming to the lightness and thinness of semiconductor packages. issues such as short development trends

Inactive Publication Date: 2017-02-15
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in the existing semiconductor package 1, the surface of the substrate 10 needs to accommodate many semiconductor chips 11 and many passive components 12 at the same time, causing the surface area of ​​the substrate 10 to increase, thereby forcing the volume of the semiconductor package 1 to increase. Does not conform to the development trend of thin, light and short semiconductor packages

Method used

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  • Electronic package and fabrication method thereof
  • Electronic package and fabrication method thereof
  • Electronic package and fabrication method thereof

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Embodiment Construction

[0043] The implementation of the present invention is described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0044] It should be noted that the structures, proportions, sizes, etc. shown in the drawings of this specification are only used to match the content disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the conditions for the implementation of the present invention , so it has no technical substantive meaning, and any modification of structure, change of proportional relationship or adjustment of size shall still fall within the scope of the disclosure of the present invention without affecting the functions and objectives of the present invention. The technical content must be within the scope covered. At the same time, terms such as "above", "first",...

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Abstract

An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement.

Description

technical field [0001] The invention relates to an electronic package, in particular to an electronic package with lightness, thinness and miniaturization and its manufacturing method. Background technique [0002] Due to the vigorous development of the electronic industry, most electronic products are developing toward the goal of miniaturization and high speed, especially the development of the communication industry has been widely used in various electronic products, such as mobile phones (Cell phone), laptop Type computer (laptop) and so on. [0003] At present, due to the miniaturization of electronic products and the increase in the demand for high operating speed, in order to improve the performance and capacity of a single semiconductor package to meet the needs of miniaturization of electronic products, the semiconductor package adopts multi-chip modularization (Multichip Module) It has become a trend to combine two or more chips in a single package to reduce the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/552H01L25/16H01L21/56
CPCH01L2924/181H01L2224/16225H01L2224/48091H01L2224/48227H01L2924/15311H01L2924/19105H01L23/552H01L23/3121H01L21/56H01L23/49816H01L23/5383H01L2224/32145H01L2224/97H01L2924/15192H01L2924/19106H01L2924/3025H01L25/16H01L2924/00014H01L2924/00012H01L2224/81H01L25/50
Inventor 石启良简俊忠钟兴隆朱德芳
Owner SILICONWARE PRECISION IND CO LTD
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