Neuron circuit

Abstract

The invention discloses a neuron circuit which comprises a pulse generation circuit, an adjustment circuit, and a comparison circuit. The pulse generation circuit is configured to simulate nerve impulse oscillation through a first Tau-cell circuit structure and a second Tau-cell circuit structure, the first Tau-cell circuit structure includes a first capacitor Cv used for simulating a neuron membrane potential v, and the second Tau-cell circuit structure includes a second capacitor Cu used for simulating a neuron membrane potential adjustment variable u. The adjustment circuit is connected with the pulse generation circuit, and is used for reassigning a value to the neuron membrane potential v. The comparison circuit is connected with the pulse generation circuit, and is used for reassigning a value to the neuron membrane potential adjustment variable u. The power consumption of the neuron circuit can be lowered, and the occupied area of the neuron circuit can be reduced.

Description

technical field [0001] The invention relates to the technical field of artificial neural networks, in particular to neuron circuits. Background technique [0002] With the deepening of artificial neural network research, the disadvantages of traditional digital circuits to realize neural networks are becoming more and more obvious. The neuron synaptic circuits required to realize the required multiplication and addition operations and nonlinear transformations are large in scale and functional. The consumption and volume are huge, and it is difficult to adapt to the needs of development. The analog circuit has simple structure, low power consumption and fast operation speed, which can significantly improve the operation efficiency of the neural network. The analog neuron circuit is one of the basic units of the analog neural network. [0003] The Izhikevich model is a mathematical model of neurons, proposed by Izhikevich, related references: Izhikevich E M. Simple model of...

AI Technical Summary

Problems solved by technology

[0009] Since the model contains product and square terms, it is more complicated to implement with traditional analog CMOS (Complementary Metal Oxide Semiconductor, complementary metal oxide semiconductor) circuits. The realization of this model in neural networks is generally realized by digital or software algorithms.

However, using digital or software algorithms to realize the neurons of this model consumes a lot of power, especially in large-scale integration, and it is difficult to adapt to the needs of future development; at the same time, in the analog neural network, it is necessary to convert neuron signals Continuous conversion between analog and analog requires a large number of D / A and A / D converters, which greatly increases the power consumption and area of ​​the circuit

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