Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

DDDMOS device and manufacture method thereof

A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of low doping concentration in the drift region and high on-resistance

Inactive Publication Date: 2016-12-14
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to achieve a sufficiently high breakdown voltage, the doping concentration of the drift region cannot be too high; so the corresponding on-resistance will be relatively high

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • DDDMOS device and manufacture method thereof
  • DDDMOS device and manufacture method thereof
  • DDDMOS device and manufacture method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0024] The present invention will be described in detail below in conjunction with the accompanying drawings.

[0025] figure 2 A cross-sectional view showing the structure of an N-type DDD NMOS device in a preferred embodiment of the present invention, the DDDNMOS device of the present invention includes: a P-type substrate 1; an N-type buried layer 2 formed on the P-type substrate ; An N-type epitaxial layer 3 formed on the N-type buried layer; N-type drift region doping 4 formed on the N-type epitaxial layer 3, and the N-type drift region doping 4 includes N-type A heavily doped region 8; a P well formed on the N-type epitaxial layer, the P well is adjacent to the drift region, and an N-type heavily doped region 8 and a P-type heavily doped region are formed in the P well Region 9; gate polysilicon 7 formed in the P well and on the drift region; a gate oxide layer 6 is formed between the gate polysilicon 7, the P well and the drift region 4, the The gate polysilicon 7 co...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a DDDMOS device. The DDDMOS device comprises a silicon substrate, a buried layer, of a first conductive type, formed on the silicon substrate; an epitaxial layer, of the first conductive type, formed on the buried layer of the first conductive type; a drift region formed on the epitaxial layer of the first conductive type and including a heavily doped region of the first conductive type; a well region, of a second conductive type, formed on the epitaxial layer of the first conductive type, being adjacent to the drift region, and internally provided with a heavily doped zone of the first conductive type and a heavily doped zone of the second conductive type; grid polysilicon formed on the well region of the second conductive type and the drift region and covering the drift region; and a grid oxidation layer formed between the grid polysilicon and the well region of the second conductive type as well as the drift region, According to the invention, the conductive breakthrough voltage of the DDDMOS device is improved, and the conduction resistance of the same is reduced.

Description

technical field [0001] The invention relates to the field of semiconductor device design, in particular to a DDDMOS device, and also relates to a manufacturing method of the DDDMOS device. Background technique [0002] DMOS power devices have the characteristics of high voltage and high current. DMOS can work in switch mode with extremely low power consumption. DDD MOS (Double Diffused Drain MOSFET) device is the abbreviation of double diffused drain high-voltage MOSFET device, which is a commonly used lateral high-voltage MOS device. Breakdown voltage and on-resistance are particularly important to measure the key parameters of DDD MOS devices. [0003] figure 1 A sectional view of an existing DDD NMOS device structure is shown, including: an N-type buried layer 2 is formed on a P-type substrate 1; an N-type epitaxial layer 3 is formed on the N-type buried layer; A P well 5 is formed in the N-type epitaxial layer; an N-type drift region 4 is also formed in the N-type epi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/06H01L29/423H01L29/78H01L21/336H01L21/28
CPCH01L29/7816H01L29/0684H01L29/42376H01L29/66681
Inventor 刘冬华
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com