Method of forming a transistor

Abstract

The invention provides a forming method of a transistor. The method comprises the steps of providing a semiconductor substrate with a fin; forming a gate structure stretching across the fin; forming a source material layer and a drain material layer on the surface of the fin at two sides of the gate structure; forming a first dielectric layer on the semiconductor substrate, the gate structure, the source material layer and the drain material layer; forming a first source through hole of which the bottom part is exposed out of the source material layer and a first drain through hole of which the bottom part is exposed out of the drain material layer in the first dielectric layer; forming a first metal layer on the source material layer at the bottom part of the first source through hole; forming a second metal layer on the drain material layer at the bottom part of the first drain through hole; carrying out barrier lowering ion implantation on the source material layer at the lower part of the first metal layer and the drain material layer at the lower part of the second metal layer; and carrying out first annealing treatment on the first metal layer and the second metal layer to form a source metal silicide layer and a drain metal silicide layer separately. By the method for forming the transistor provided by the invention, the performance of the transistor can be improved.

Description

technical field [0001] The present invention relates to semiconductor manufacturing, and more particularly to methods of forming transistors. Background technique [0002] With the development of the semiconductor industry to lower technology nodes, the transition from planar CMOS transistors to three-dimensional Fin Field Effect Transistors (FinFETs) has gradually begun. In FinFET, the gate structure can control the channel from at least two sides, which has a much stronger gate-to-channel control ability than planar MOSFET devices, and can well suppress the short-channel effect. And compared with other devices, it has better compatibility with the existing integrated circuit production technology. [0003] refer to figure 1 with figure 2 , the formation method of the P-type fin field effect transistor in the prior art is as follows: [0004] First, a semiconductor substrate 10 is provided, which has fins 11 . Next, a gate structure 12 across the fin portion 11 is for...

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Problems solved by technology

[0006] The problem that the present invention solves is that the performance of the P-type fin field effect transistor formed by the method of the prior art is not good

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