Calculation engine and electronic equipment

Abstract

The invention relates to the technical field of calculation acceleration and discloses a calculation engine and electronic equipment to increase the utilization rate of data, reduce bandwidth requirement and improve calculation performance. The calculation engine comprises a cache management module, a matching and distributing module and at least L calculation modules, wherein the cache management module is used for reading L element values in an M-dimensional input vector and conducting caching, reading L-dimensional row vectors in submatrixes corresponding to the L element values in an M*N parameter matrix in sequence and transmitting the L-dimensional row vectors to the matching and distributing module, and the matching and distributing module is used for taking out a corresponding element value from the cache management module every time an L-dimensional row vector is received, matching the element value taken out with values in the L-dimensional row vectors, and sending matching results to the corresponding calculation modules in the at least L calculation modules; any one calculation module is used for calculating the matching results.

Description

technical field [0001] The present application relates to the technical field of computing acceleration, in particular to a computing engine and electronic equipment. Background technique [0002] In the field of artificial intelligence, some technologies such as character recognition, image classification, and speech recognition need to be realized by network technologies with complex algorithm functions. For example, deep neural network (English: Deep Neural Network, DNN) technology has become a representative Algorithms are widely used in search engines, smart phones and other products. [0003] A typical DNN structure such as figure 1 As shown, the DNN structure has an input layer, an output layer, and several hidden layers, figure 1 In the example with two hidden layers. in, figure 1 Each circle in represents a neuron, for example, the four neurons in the input layer are denoted by a1, a2, a3, and a4 respectively. Each neuron performs the same operation, that is, c...

AI Technical Summary

Problems solved by technology

[0008] With the above-mentioned existing hardware computing architecture, the two multipliers input to the multiplier cannot be used in the next calculation, so data import and export are required every time

To sum up, this computing method has a large demand for bandwidth, and the computing performance bottleneck of the hardware computing architecture is limited by the input bandwidth, so it cannot exert its maximum computing performance.

Images