Field programmable gate array (FPGA) realization method of sampled measured value (SMV)/generic object oriented substation event (GOOSE) message based on reduced media independent interface (RMII)
An implementation method and interface technology, applied in the direction of synchronous signal speed/phase control, digital transmission system, electrical components, etc., can solve the problems of increasing the cost of merging units, increasing the complexity of PCB design, increasing the chip size, etc.
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[0031] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0032] Such as figure 1 As shown, the FPGA implementation method of the SMV / GOOSE message based on the RMII interface includes:
[0033] Step 1: Initialize the FPGA internal registers, buffer the message data to the sending buffer; wait for the sending enable signal;
[0034] Step 2: After receiving the enable signal, the transmit enable terminal TX_EN is pulled high to enter the data transmission state; whenever the PHY chip clock falls, 2-bit data is sent through the TXD[1:0] (transmit data line) port, and every time the When one byte is finished, the counter is incremented by one; firstly send 7 bytes of "0x55" (Preamble) for the receiver to realize synchronization and extract clock information, and then send 1 byte of "0xd5" (SFD) to use At the start of notifying the receiver of valid data;
[0035] Step 3: Send the message data in the buffer to ...
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