Method and apparatus for detecting chip bonding conditions of printed circuit board

Abstract

The application discloses a method and apparatus for detecting chip bonding conditions of a printed circuit board. The method comprises the steps of outputting a first level alone to an x-th PIN port of a printed circuit board to be detected by using a first GPIO port; reading out second levels of a y-th PIN port of the printed circuit board to be detected separately by using a second GPIO port connected with a pull-up resistor or a pull-down resistor, wherein y>x; and when the second levels are equal to the first level, determining a short circuit between the y-th PIN port and the x-th PIN port, and when neither of the second levels is equal to the first level, determining no short circuit between the y-th PIN port and the x-th PIN port, until the determination of all the short circuit situations among the PIN ports is completed. The method and apparatus can quickly detect the chip bonding conditions of the printed circuit board to be detected in a non-destructive manner and position the specific location where a short circuit occurs after the chip bonding, thereby facilitating the summarizing of causes of insufficient bonding of the printed circuit board and improving the product yield.

Description

technical field [0001] The invention relates to the technical field of circuit manufacturing, in particular to a method and a device for detecting chip welding conditions of a printed circuit board. Background technique [0002] With the development of electronic technology, integrated chips are becoming more and more complex, and more and more IO pins are packaged. In order to reduce the area occupied by chips on printed circuit boards, integrated chip packaging technology has been developed, especially BGA / WLCSP packaging technology achieves as many IO pins as possible on a small chip package. This type of chip is generally more expensive, and after this type of package chip is soldered on a printed circuit board, the integrated chip The IO pins of the integrated chip are on the bottom of the integrated chip, and the IO pins of the integrated chip are not visible, which is inconvenient to detect the soldering situation. Moreover, such IO pins are generally very small, and ...

AI Technical Summary

Problems solved by technology

[0003] A current method is as follows: for this type of printed circuit board soldering BGA / WLCSP packaged chips, download the program into the integrated chip, so that its IO pins continuously output high and low levels, and the pins drawn out of the printed circuit board Use tools such as an oscilloscope to see whether there is a waveform output. This method is inefficient and can only detect the virtual soldering (open circuit) of the integrated chip. It cannot detect the short circuit between the pins of the integrated chip. Moreover, if the printed The power IO of the circuit board and the ground IO are shorted together after soldering, or several IO pins are soldered and shorted together. For the power IO and ground IO of the printed circuit board, they are shorted together after soldering. When the board is powered, it is possible to burn out the power supply. For several IO pins that are short-circuited after soldering, configure all IO pins to output high and low levels continuously. For push-pull output high and low levels, short-circuit after soldering Several IO pins together have push-pull output high level, and some push-pull output low level, which is equivalent to push-pull output high level and push-pull output low level, which is equivalent to connecting power and ground Short circuit, which is easy to damage the integrated chip during the detection process, and may also damage the power supply

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