Video acquisition system supporting parallel preprocessing
A technology for video capture and preprocessing, applied in CCTV systems, components of TV systems, image data processing, etc., can solve problems such as FPGA program curing, achieve easy hardware implementation, and improve the ability of emergencies and unfavorable factors , the effect of low power consumption
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Embodiment 1
[0036] see figure 1 , the video acquisition system that supports parallel preprocessing is composed of a data acquisition terminal connected to a data processing terminal, and is characterized in that: the data acquisition terminal is used to collect monitoring video information and perform real-time data analysis and preprocessing. The sensor module is sequentially formed through a first data interface, an online data preprocessor, a data compression module and a second data interface; the image sensor module is a SOC system on a chip for collecting monitoring video data, The collected monitoring video information is sent to the first data interface through its image video interface; the first data interface, online data preprocessor, data compression module, and second data interface are integrated on another SOC system-on-chip, and the first A data interface reads the monitoring data of the image sensor module and outputs it to the online data preprocessor; the online data ...
Embodiment 2
[0039] refer to figure 1 , a video acquisition system that supports parallel preprocessing, including a data acquisition terminal 1 and a data processing terminal 2, characterized in that: the above-mentioned data acquisition terminal 1 is used to collect monitoring video information and perform real-time data analysis and preprocessing, including an image sensor Module 10 , first data interface 11 , online data preprocessor 12 , data compression module 13 , and second data interface 14 . The image sensor module 10 is a SOC system-on-chip I, and the first data interface 11, online data preprocessor 12, data compression module 13, and second data interface 14 are integrated on another SOC system-on-chip J.
[0040] Wherein, the image sensor module 10 collects monitoring video data, and the collected monitoring video information is sent to the first data interface 11 through wired communication or wireless communication; the interface of the image sensor module 10 and the first ...
Embodiment 3
[0053] This embodiment is basically the same as Embodiment 2, and the special features are as follows:
[0054] refer to figure 2 , after the parallel processor is connected by a control unit 121 to n processors 123 and n local storages 124 via the second bus 125, it is then connected to the FIFO cache unit 122 via the third bus 126; wherein the control unit 121 receives data from the first data interface 11 for encoding and decoding, generates control signals and operands, and sends them to n processors 123 and local memory 124 in parallel, and n processors 123 are controlled by control signals in parallel or independently Execute relevant access and calculation, and deliver the processing results to the FIFO cache unit 122; wherein, the n local storages 124 store the control signals and operands generated by the control unit 121, and the processing results of the processor 123; wherein , the FIFO buffer unit 122 delivers data to the data compression module 13 according to ...
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