Formation method of semiconductor structure

Abstract

The invention provides a method for forming a semiconductor structure, and the method comprises the steps: providing a substrate; forming a sacrifice pattern on the substrate; depositing side wall material layers on the sacrifice pattern and the substrate through employing deposition equipment, carrying out the etching of the side wall material layers, and forming side walls on side walls of the sacrifice pattern; taking the side walls as hard masks, carrying out the etching of the substrate, and forming a semiconductor figure. The deposition equipment is employed for depositing the side wall material layers on the sacrifice pattern and the substrate, and the output radio frequency power of the deposition equipment is switched between the first power and the second power in the deposition process of the side wall material layers, wherein the first power and the second power have different frequencies. The method can enable tension stress and compression stress generated in the side wall material layers to be counteracted with each other partly, thereby enabling the total stress in the side walls to be smaller after the side walls are formed through the etching of the side wall material layers, and enabling the deformation not to be liable to happen. The feature size of the semiconductor figure is smaller when the side walls are taken as the masks.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for forming a semiconductor structure. Background technique [0002] With the continuous shrinking of the feature size of the semiconductor lithography process, it has been difficult for the existing exposure equipment to further reduce the minimum line width and spacing of the pattern by reducing the pattern size on the mask plate. [0003] In order to further reduce the minimum line width and spacing of graphics, a self-aligned double patterning (Self-Aligned Double Patterning, SADP) technology has been developed in the prior art. Figure 1 to Figure 3 It shows a part of a common self-aligned double exposure process: the sacrificial pattern 02 is defined by photolithography on the substrate 01, and the thin film 03 is deposited on the top and side walls of the substrate 01 and the sacrificial pattern 02 , etch the film 03, remove the film 03 on the substrate 01 and the to...

AI Technical Summary

Problems solved by technology

However, in the existing self-aligned double exposure technology, such as image 3 As shown, after removing the sacrificial pattern 02, the side wall 04 may be inclined towards the original position of the sacrificial pattern 02, or the side wall 04 may also be inclined towards the original position of the sacrificial pattern 02

[0005] Using the inclined sidewall 04 as a hard mask to etch the substrate 01, the resolution of the formed semiconductor pattern is poor, and the shape of the semiconductor pattern is inconsistent with the required shape

Images