Time synchronous pluggable transceiver
A transceiver and time stamp technology, applied in synchronization devices, multiplexing communication, time division multiplexing systems, etc., can solve the problems of damaging the synchronous Ethernet clock chain and affecting the performance of the IEEE1588 standard.
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[0025] For the sake of brevity, all references to Ethernet below refer to electrical Ethernet unless optical Ethernet is specifically mentioned.
[0026] As mentioned earlier, in Electrical Ethernet SFPs, Ethernet signal processing at the physical layer breaks the Synchronous Ethernet (syncE) clock chain. figure 1 This situation is illustrated, where the figure depicts a basic block diagram of a known Electrical Ethernet SFP.
[0027] Physical layer (PHY) preprocessing in the SFP results in the inability to provide recovered SyncE timing in the receive direction to the near-end Ethernet line card located at the SFP host device, and this portion of the electronics on the SFP printed circuit board is marked as 102. Such as figure 1 As shown, electrical Ethernet frame 122 arrives at SFP 110 via RJ45 jack 116 . These electrical Ethernet frames 122 have SyncE timing indicated here at 118 . While the electrical Ethernet frame 122 is propagated through the electronics (line recei...
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