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Simulation platform design method based on Power PC SoC framework

A technology of simulation platform and design method, which is applied in computing, special data processing applications, instruments, etc., can solve problems such as the inability to evaluate the quality of SoC architecture, and the accuracy of rough modeling, so as to shorten the time-to-market cycle, speed up the design process, shorten The effect of the development cycle

Inactive Publication Date: 2016-06-22
TIANJIN UNIV
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Problems solved by technology

Therefore, the simulation speed is fast, and large-scale systems such as operating systems or application software can be run, but the excessively rough modeling accuracy makes it impossible to evaluate the pros and cons of the SoC architecture

Method used

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  • Simulation platform design method based on Power PC SoC framework
  • Simulation platform design method based on Power PC SoC framework
  • Simulation platform design method based on Power PC SoC framework

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Embodiment Construction

[0027] The simulation platform design method based on the PowerPCSoC architecture of the present invention will be described in detail below in conjunction with the embodiments and the accompanying drawings.

[0028] The simulation platform design method based on the PowerPCSoC architecture of the present invention combines the advantages of two methods based on transaction-level modeling and virtual machine technology, and uses the method of dynamic binary translation of the QEMU virtual machine to implement the instruction set simulator for PowerPC405 series processors. design. And based on the SystemC transaction-level modeling method, the precise modeling of key components in PowerPCSoC such as the slave device module, interrupt module, and DCR register is completed, and the hardware behavior of the SoC is accurately simulated. Finally, based on the designed PowerPCSoC simulation platform, the software development process is designed, and the software-hardware co-design of...

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Abstract

A simulation platform design method based on a Power PC SoC framework comprises the following steps: instruction set simulation, using QEMU virtual machine dynamic binary system translation technology as an instruction set simulation device of the Power PC SoC framework simulation platform to carry out instruction set simulation; modeling key assemblies in the simulation platform, accurately modeling main equipment modules and slave equipment modules according to a System C transaction level modeling method, and designing the Power PC SoC framework simulation platform with complete functions; interruption design, realizing an interruption system of the simulation platform. The novel method can realize software and hardware cooperation simulation, can reduce design risks and error correction cost, can accelerate product design process, reduces product market period, and instruction set expansion and IP module functions can provide certain guide meanings for hardware development.

Description

technical field [0001] The invention relates to a design method of a simulation platform. In particular, it relates to a simulation platform design method based on the PowerPCSoC framework based on the SystemC transaction level modeling and the PowerPCSoC simulation platform. Background technique [0002] The SoC design based on ESL (ESL, Electronic System Level) can quickly build a hardware platform, and quickly develop / verify software applications, and then determine the optimal architecture of the system, and realize the collaborative design of SoC software and hardware. ESL design includes two technologies, one is based on transaction-level modeling method, which can use SystemC language to accurately model the behavior of hardware modules, and complete system verification and design space detection, but accurate modeling As a result, the emulation speed of the described hardware platform is too slow to run large-scale system / application software, such as operating syst...

Claims

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/367G06F2117/08
Inventor 郭炜李垠男魏继增
Owner TIANJIN UNIV
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