Semiconductor structure manufacturing method

Abstract

The invention discloses a semiconductor structure manufacturing method which at least comprises the following steps: to begin with, providing a substrate, wherein a first area of the substrate comprises a plurality of fin-shaped structures and an insulation layer arranged on the substrate and between the fin-shaped structures; then, forming a first material layer covering the fin-shaped structures and the insulation layer; and partially removing the fin-shaped structures and forming at least one epitaxial layer on the top portion of each residual fin-shaped structure.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing technology, in particular to a manufacturing process for avoiding the mutual contact between an epitaxial layer formed on a fin structure and other adjacent epitaxial layers. Background technique [0002] As the size of field effect transistors (FETs) continues to shrink, the development of existing planar field effect transistors is facing the limit of the manufacturing process. In order to overcome the limitations of the manufacturing process, it has become increasingly popular to replace planar transistor elements with non-planar field effect transistor elements, such as multi-gate field effect transistor (multi-gate MOSFET) elements and fin field effect transistor (finfield effect transistor, FinFET) elements. The current mainstream development trend. Since the three-dimensional structure of the non-planar transistor element can increase the contact area between the gate and the fin...

AI Technical Summary

Problems solved by technology

[0004] However, as the scale of semiconductor devices continues to shrink, even using non-planar field effect transistor devices and strained silicon technology at the same time cannot solve all technical deficiencies

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