Frequency-perceptive quick DFF soft error rate assessment method and system

Abstract

The invention discloses a frequency-perceptive quick DFF soft error rate assessment method used for assessing the soft error rate of a DFF subjected to neutron irradiation. The method comprises the steps that multiple operating frequencies are selected within the operating frequency range of the DFF, multiple soft error rates in one-to-one correspondence with the selected operating frequencies of the DFF are obtained, the soft error rates and the selected operating frequencies are fitted to obtain a functional relation between the soft error rates and the operating frequencies, and the soft error rate of the DFF operating at any operating frequency is obtained according to the functional relation. The invention correspondingly discloses a frequency-perceptive quick DFF soft error rate assessment system. Targeting the problem that the evaluation speed is low through an existing method, the method achieves quick soft error rate evaluation of a sequential logic component, and evaluation speed and sequential logic circuit evaluation can be realized simultaneously by combining and expanding methods based on the method.

Description

technical field [0001] The invention relates to the technical field of integrated circuit reliability evaluation, in particular to a frequency-aware fast DFF soft error rate evaluation method and system. Background technique [0002] With the advancement of integrated circuit technology, the problem of soft errors caused by high-energy particles hitting sensitive nodes of circuits has become increasingly prominent, seriously affecting the reliability of electronic systems. When high-energy particles hit sensitive nodes in CMOS integrated circuits, they will cause very short voltage disturbances in the circuit. After these signal burrs are captured by sequential logic components such as DFF (D flip-flops), they will cause 0 / 1 state flip. In addition, if the particle directly hits the DFF, it can also directly cause the state of the DFF to flip. Because these errors are only errors in storing information, and the hardware of the circuit itself does not fail, they are called...

AI Technical Summary

Problems solved by technology

The main disadvantage of this method is that it cannot be used in the design stage, that is, before the integrated circuit tape-out process; the other disadvantage is that it is expensive and requires special experimental equipment

[0014] 2) Fault injection

[0022] 1. The evaluation speed is slow: the fault injection method can evaluate the soft error rate in the design stage, and it can also be applied to circuits containing sequential logic, but the evaluation speed is very slow;

[0023] 2. Cannot be used in sequential logic circuits: common analytical methods are difficult to apply to circuits containing sequential logic, or are not suitable for large circuits;

[0024] 3. The influence of clock frequency is not considered: the evaluation method based on critical charge does not consider the influence of clock frequency at all, which is incomplete

Images