Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Protection method of IP (internet protocol) core with determined validity

A technology of validity period and state machine, which is applied in the fields of program/content distribution protection, instrumentation, and electrical digital data processing. Guaranteed integrity and good concealment

Active Publication Date: 2015-04-01
TIANJIN UNIV
View PDF3 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method cannot test the power consumption and other information integrated in the chip and the compatibility with other modules in the chip. The use of the IP core is limited and has certain limitations.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Protection method of IP (internet protocol) core with determined validity
  • Protection method of IP (internet protocol) core with determined validity
  • Protection method of IP (internet protocol) core with determined validity

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0013] The present invention will be further described in detail below in combination with specific embodiments.

[0014] The timing function is usually realized by a counter in the hardware circuit, and an operation of adding 1 to the counter is triggered in each clock cycle of the IP core circuit. An n-bit counter consists of n registers. When the registers are all 1s, the overflow bit is set to 1, and the remaining bits are cleared to 0. The time for the counter to overflow once is:

[0015] T=2 n ·T clk (1)

[0016] In some high-frequency clock IP core circuits, to achieve a longer counting period, it is necessary to increase the number of counter bits. For example, when the clock frequency is 100MHz, that is, when the cycle is 10ns, to enable the IP core circuit to work continuously for 1 day, according to the formula (1), the number of bits of the counter is about 43 bits. If this counter structure is directly used, it will not only greatly increase the area overh...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a protection method of an IP (internet protocol) core with determined validity. The method is realized through implanting counters into redundant state of a plurality of state machines of the IP core, and using low-overturn probability node in the IP core circuit as trigger condition of the redundant state. A plurality of counters are arranged in a classification manner, the next class of counter is subjected to carrying when the front class of counter is full, and a control signal is transmitted to the IP core circuit when the last class of counter is full to make the IP core become unusable. In an actual use process, through changing the bits of the counters in the implanted state machines and reasonably selecting the number of the state machines, the IP core circuit is enabled to fail in a predetermined time range to limit the user of the IP core, so as to protect the IP core effectively. The service life of the IP core circuit is prolonged effectively by the structure in the primary IP core circuit on the basis of saving the IP core circuit area, so good elusive performance and high flexibility are realized.

Description

technical field [0001] The invention designs a method for protecting an IP core, and in particular relates to a method for protecting an IP core with a limited validity period. Background technique [0002] As the scale of integrated circuits becomes larger and the integration level of chips becomes higher and higher, the application of SOC (system-on-chip) becomes more and more extensive. But for large circuits, no matter in terms of design cost, design cycle or reliability, the traditional method can no longer meet the demand. The emergence of IP core multiplexing technology has effectively solved these problems, and the designed IP modules can be used directly. The emergence of IP cores has greatly improved the efficiency of large-scale IC design and greatly promoted the development of the integrated circuit design industry, which has made IP cores develop rapidly and become the fastest growing part of the integrated circuit industry. However, with the promotion and use...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F21/00
CPCG06F21/10G06F2221/2137
Inventor 赵毅强杨松刘沈丰何家骥
Owner TIANJIN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products