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Semiconductor structure with device isolation areas and manufacturing method of semiconductor structure

A device isolation and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve the problem of reducing the width W and achieve the effects of reducing possibility, improving performance, and improving stability

Inactive Publication Date: 2015-01-14
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in order to meet the requirements of aspect ratio and other requirements in the existing STI forming technology, it is impossible to reduce the width W to a very small one.

Method used

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  • Semiconductor structure with device isolation areas and manufacturing method of semiconductor structure
  • Semiconductor structure with device isolation areas and manufacturing method of semiconductor structure
  • Semiconductor structure with device isolation areas and manufacturing method of semiconductor structure

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Embodiment Construction

[0024] In order to make the object, technical solution and advantages of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0025] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0026] The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and arrangements of specific examples are described below. Of course, they are only examples and are not int...

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PUM

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Abstract

The invention provides a manufacturing method of a semiconductor structure with device isolation areas. The method includes the steps of providing a semiconductor substrate; forming first groves in the semiconductor substrate, filling the first grooves with first insulating layers, and making the first insulating layers exposed out of the upper surface of the semiconductor substrate; making an epitaxial layer grow on the upper surface of the semiconductor substrate, wherein the epitaxial layer covers the whole upper surface of the semiconductor substrate; etching the epitaxial layer to form second grooves which make the first insulating layers exposed, wherein the width of the second grooves is smaller than the width of the first grooves; filling the second grooves with second insulating layers, and forming the device isolation areas through the first insulating layers and the second insulating layers. The invention further provides the corresponding semiconductor structure. By means of the manufacturing method and the semiconductor structure, the stability of the work of semiconductor devices can be improved, and the work performance of the semiconductor devices can be improved as well.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure with device isolation regions and a manufacturing method thereof. Background technique [0002] With the development of semiconductor structure manufacturing technology, integrated circuits with higher performance and stronger functions require greater component density, and the size, size and space of each component, between components or each component itself also need to be further reduced. No matter how the size of the component changes, proper insulation or isolation between individual components is still required to obtain stable component properties. [0003] Among the existing component isolation technologies, the technology of forming shallow trench isolation (STI) is more commonly used, and its advantages include: it can form a smaller isolation region, and in addition, the semiconductor substrate can be kept flat after the isolation ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762H01L21/31H01L27/04
CPCH01L21/76224H01L21/31H01L27/04
Inventor 钟汇才梁擎擎尹海洲
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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