Simulation reference level buffer for pipelined analog-digital converter

Abstract

The invention discloses a simulation reference level buffer for a pipelined analog-digital converter. Output levels of a sub-analog-digital converter of the pipelined analog-digital converter include a high simulation reference level, an intermediate simulation reference level and a low simulation reference level, and the simulation reference level buffer comprises three buffer bodies which are used for providing buffering for the three simulation reference levels respectively. Each buffer body is composed of a folded-cascode amplifier and a source follower, one input end of the folded-cascode amplifier is connected with the corresponding simulation reference level, an output end of the folded-cascode amplifier is connected to an input end of the source follower, and an output end of the source follower is fed back to the other input end of the folded-cascode amplifier. The capacity for driving switch of the three simulation reference levels of the sub-analog-digital converter of the pipelined analog-digital converter can be improved while voltages of the three simulation reference levels are kept unchanged fundamentally.

Description

technical field [0001] The present invention relates to a semiconductor integrated circuit, in particular to an analog reference level buffer for a pipelined analog-to-digital converter (ADC). Background technique [0002] Due to its fast speed and high resolution, the pipelined A / D converter is a structure widely used in high-speed and high-precision A / D converters. In the pipeline analog-to-digital converter, switches are used extensively in its sample-and-hold circuit and other subsequent circuits. Such as figure 1 As shown, it is the existing simplified 1.5-bit / Stage pipeline analog-to-digital converter module, and the existing ADC-level module includes a sub-ADC module 101 , a sub-DAC module 102 and a sample-and-hold module 103 . Wherein the sub-analog-to-digital converter module 101 includes two comparators 104 and 105, and a decoder 106, the decoder 106 outputs a digital signal Digital Output, and the sub-analog-to-digital converter module 101 outputs a digital sign...

AI Technical Summary

Problems solved by technology

In the existing pipeline analog-to-digital converter, it is difficult for the voltage signal driving the switch to have enough current to drive the switch at the same time, resulting in the failure to maintain the normal working sequence

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