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Frequency correction method and system of phase-locked loop

A frequency correction and phase-locked loop technology, applied in the field of communication, can solve problems such as time pressure and long correction time

Active Publication Date: 2014-09-17
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0022] In addition to other overheads, the calibration time is generally close to 50us. For radio frequency transceivers, the calibration time is too long, which will bring time pressure to other operations of the system.

Method used

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  • Frequency correction method and system of phase-locked loop

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0122] see Figure 4a , which is a flow chart of Embodiment 1 of the PLL frequency correction method provided by the present invention.

[0123] The PLL frequency correction method provided in this embodiment is applied to sub-band selection of a multi-band voltage-controlled oscillator; including:

[0124] S401a: At counting time T CNT [k], carry out frequency counting on the frequency signal output by the voltage-controlled oscillator under the current working sub-band, and obtain the frequency count value FCNT[k], wherein the current working sub-band corresponds to the current node in the binary search tree binary value;

[0125] It should be noted that the frequency technique is performed on the frequency signal output by the voltage-controlled oscillator in the current working sub-band by a frequency counter.

[0126] It can be understood that, for a multi-band voltage-controlled oscillator, its current working sub-band refers to the binary value corresponding to the c...

Embodiment 2

[0133] see Figure 4 b, this figure is a flow chart of Embodiment 2 of the PLL frequency correction method provided by the present invention.

[0134] The broadband phase-locked loop frequency correction method provided in this embodiment includes:

[0135] S401: at the current counting time T CNT [k], judge the current count value FCNT[k] output by the frequency counter and the corresponding current target frequency count value FCNT TARGET Whether the error of [k] is less than a predetermined value; the frequency counter counts the output frequency of the voltage-controlled oscillator; the T CNT [k]=T REF*R[k]; the FCNT TARGET [k]=R[k]×FCW; the voltage-controlled oscillator is a multi-band voltage-controlled oscillator; sub-band selection in the multi-band voltage-controlled oscillator is controlled by a digital signal; that is, CT is a digital signal.

[0136] Among them, T REF For the period of phase-locked loop input reference clock; R[k] is counting time parameter, ...

Embodiment 3

[0180] see Figure 6 , which is a flow chart of Embodiment 3 of the PLL frequency correction method provided by the present invention.

[0181] This embodiment introduces a most complete correction process.

[0182] It has been introduced that R[k] is a positive integer in the first method embodiment, because in practical applications, for the convenience of implementation, R[k] can be set to the form of an integer power of 2, because in the logic circuit, it is only necessary to perform The shift operation can realize the calculation of the integer power of 2, which can greatly reduce the consumption of chip resources. Therefore, in this embodiment, R[k] is realized by an integer power of 2.

[0183] S601: at the current counting time T CNT Under [k], read the current count value FCNT[k] of the frequency counter;

[0184] S602: Calculate the current target frequency count value FCNT TARGET [k]; S603: by FCNT[k] and FCNT TARGET [k] Get the error FCNT of both ERR =FCNT[k]-...

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Abstract

The invention provides a frequency correction method and system of a phase-locked loop. The frequency correction method and system of the phase-locked loop are applied to selection of sub-bands of multi-band voltage-controlled oscillators. The method includes the steps that in the counting time TCNT [k], frequency counting is conducted on frequency signals output by a voltage-controlled oscillator at the current working sub-band, and a frequency count value FCNT[k] is obtained, wherein the current working sub-band corresponds to a binary value of a current node in a binary search tree; the error between the FCNT [k] and a target frequency count value FCNTTARGET [k] is calculated, the absolute value of the error is compared with a predetermined value, the TCNT [k] is adjusted dynamically in value range of the TCNT [k] according to a comparison result, and a target working sub-band of the voltage-controlled oscillator is determined by combining the binary search algorithm. According to the method, the measurement error is compared with the predetermined value, and therefore whether a counting time reference is increased or not is controlled; a correct choice is made between correction time and correction accuracy, and therefore the correction time is effectively controlled; the dynamic correction method can effectively shorten the correction time on the whole.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a method and system for correcting the frequency of a phase-locked loop. Background technique [0002] In wireless radio frequency transceivers, a frequency synthesizer based on a phase-locked loop (PLL, Phase-Locked Loop) structure is widely used to generate a local oscillator signal, referred to as a local oscillator (LO, Local Oscillator), to complete the frequency shift of the signal. [0003] In modern wireless communication, it is required that the radio frequency transceiver can work in multiple frequency bands, therefore, the output signal of the phase-locked loop needs to cover a sufficiently wide frequency range. [0004] To realize a broadband phase-locked loop, a core device in the phase-locked loop, a voltage-controlled oscillator (VCO, Voltage-Controlled Oscillator), also needs to work in a sufficiently wide frequency range. Because voltage-controlled oscill...

Claims

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Application Information

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IPC IPC(8): H03L7/18H03L7/181
CPCH03L7/18H04B17/14H04B17/21H04B1/16H04L7/0331H04L27/152
Inventor 高鹏朱年勇梁建
Owner HUAWEI TECH CO LTD
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