Demultiplex device and method adopting HD (high definition) video channel to transmit SD (standard definition) videos

Abstract

The invention discloses a demultiplex device and method adopting an HD (high definition) video channel to transmit SD (standard definition) videos. According to the invention, a plurality of SD video images are stitched into an HD video image by adopting the video scaling and image stitching functions of a video decoding chip, and the stitched HD video is output from the HD video output channel provided by the video decoding chip; an FPGA chip receives and detects an HD output channel video stream of the video decoding chip, and completes processing such as abstracting, line buffering, frame buffering and odd-even field separating according to the stitching coordinate of each SD video in the HD video image; moreover according to each SD video parameter, a standard SD video time sequence is generated, and each abstracted SD video data is formatted into a standard time sequence which is then output to a video DAC chip outside the FPGA chip. Therefore, the demultiplex output of the SD videos can be realized from the HD video output channel through the FPGA.

Description

technical field [0001] The present invention belongs to the field of video monitoring, and in particular relates to a method based on FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) to realize high-definition (High Definition, HD) video channel transmission multi-channel standard definition (Standard Definition, SD ) video demultiplexing device and method. Background technique [0002] In the video monitoring system, the decoding output of multiple channels of video is realized by the video decoder. Among them, the decoding chip responsible for decoding mostly uses a dedicated ASIC (Application Specific Integrated Circuit, application specific integrated circuit) chip or DSP (Digital Signal Processor, digital signal processor) chip. [0003] At present, the decoding chip supports multiple video formats and multiple video standards, and has the ability to simultaneously decode multiple channels of video. However, usually the number K of video decoding ou...

AI Technical Summary

Problems solved by technology

However, usually the number of video decoding output channels K that can be provided by general decoding chips is limited, and in practical applications, the number of video decoding channels N required by the video surveillance system is often greater than the number of video decoding output channels K

When the number of video decoding channels N required in the video surveillance system is greater than the number of video decoding output channels K that the decoding chip can provide, due to the limitation of the number of video decoding output channels K of the decoding chip itself, it cannot meet the system requirements at all, unless the capacity is expanded. Or multiple decoding chips to meet the requirements

[0004] For example: the video surveillance system requires decoding output of 8-channel SD video, a decoding chip can support simultaneous decoding of 8-channel SD video at most, but only provides 1-channel HD video output and 2-channel analog video output, if you want to meet the system requirements, in Under the current technical conditions, 2~4 pieces of such decoding chips may be needed to achieve 8-channel SD video output, which will result in high design cost, increased design complexity, and reduced utilization of decoding chips

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