Multi-layer multi-chip fan-out structure and manufacturing method

Abstract

The present invention provides a multi-layer multi-chip fan-out structure, which includes a carrier board, and the carrier board is provided with a plurality of stacked package sub-bodies; each package sub-body is packaged with at least one die; each package sub-body Among them, the die is covered by the dielectric material of the dielectric layer, and the die is mounted on the metal pad in the form of facing up; an RDL layer is provided on the dielectric layer of each package sub-body; the soldering on the front of the die The disk is electrically connected to the RDL layer of the package sub-body where the die is located through the first interconnection hole; an insulating layer is provided between the adjacent package sub-bodies, and the RDL layers of the adjacent package sub-body are connected through the second interconnection layer between the layers. Through-hole electrical connection. The metal pad in the bottom package sub-body is pressed on the surface of the carrier board; the metal spacer in the middle or top package sub-body is pressed on the insulating layer between the package sub-body; a layer is arranged on the surface of the top package sub-body solder mask. The invention can realize three-dimensional multi-chip stacking relatively easily.

Description

technical field [0001] The invention relates to the field of microelectronic packaging, in particular to a stacked chip fan-out structure and a manufacturing method. Background technique [0002] Today's electronic packaging must not only provide protection for the chip, but also meet the ever-increasing requirements for performance, reliability, heat dissipation, and power distribution at a certain cost. The increase in the speed and processing capacity of functional chips requires more pins , faster clock frequency and better power distribution. At the same time, due to the increasing demand of users for ultra-thin, miniaturized, multi-functional, high-performance and low-power intelligent mobile electronic products, it directly promotes the integration of mobile terminal chip computing and communication functions, and the integration level and complexity are increasing. The higher the power consumption and the lower the cost trend. [0003] Traditional packaging techniq...

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to overcome the deficiencies in the prior art, to provide a multi-layer multi-chip fan-out structure and a manufacturing method, which can easily realize three-dimensional multi-chip stacking, and can also avoid the occurrence of low alignment accuracy of chips. chip shift

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