Packaging structure shared by heat dissipation channel and ground wire channel in three-dimensional packaging

Abstract

The invention relates to a packaging structure shared by a heat dissipation channel and a ground wire channel in three-dimensional packaging. The packaging structure comprises a packaging chip, wherein the packaging chip comprises a substrate; the substrate internally comprises a power connecting hole, a heat dissipation grounding hole and a signal connecting hole; a power connecting conductor is filled in the power connecting hole; a heat dissipation grounding conductor is filled in the heat dissipation grounding hole; a signal connecting conductor is filled in the signal connecting hole; the power connecting conductor is isolated from the substrate through an insulation layer in the power connecting hole; the signal connecting conductor is isolated from the substrate through an insulation layer in the signal connecting hole; a heat sink ground plane plate is arranged above the packaging chip; a base plate is arranged under the packaging chip; the heat sink ground plane plate is arranged in the base plate; an upper end of the heat dissipation grounding conductor is contacted with the heat sink ground plane plate; and a lower end of the heat dissipation grounding conductor is contacted with the heat sink ground plane plate in the base plate. The packaging structure has a simple and compact structure, is favorable to improve a heat dissipation effect and a grounding effect of three-dimensional packaging, is wide in application range, and is safe and reliable.

Description

technical field [0001] The invention relates to a package structure, in particular to a package structure shared by a heat dissipation channel and a ground wire channel in a three-dimensional package, and belongs to the technical field of microelectronic package. Background technique [0002] With the development of people's requirements for electronic products in the direction of miniaturization, multi-function, and environmental protection, people strive to make electronic systems smaller and smaller, with higher integration and more functions. , resulting in many new technologies, new materials and new designs, among which stacked chip packaging technology and system-in-package (System-in-Package, SiP) technology are one of the typical representatives of these technologies. [0003] Three-dimensional packaging technology refers to expanding the packaging structure from two-dimensional layout to three-dimensional layout, and achieving higher density and higher performance ...

AI Technical Summary

Problems solved by technology

[0005] However, three-dimensional packaging brings greater challenges to conditions such as heat dissipation and grounding while increasing integration density and improving high-frequency and high-speed performance.

Due to the improvement of integration density, the three-dimensional stacking structure doubles the power density of the system, making it more difficult to manage the heat-generating area; the three-dimensional stacking structure keeps the chips sandwiched in the middle in a closed environment, without a suitable heat dissipation path; It becomes difficult to achieve a good grounding of the entire chip in the middle chip, and power integrity control is even more difficult

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