Caching system and cache accessing method

Abstract

The invention discloses a caching system and a cache accessing method. The caching system comprises a translation lookaside buffer, a comparison circuit, an auxiliary cache and a transit temporary register. Capacity of the auxiliary cache is not bigger than that of a page; and the auxiliary cache is connected with a main register directly. The transit temporary register is arranged between the auxiliary cache and a register. The auxiliary cache comprises an information area of a first quantity number of terms and a label area of the first quantity number of terms, low bits of a second quantity number of terms of a physical address of register information content in each sub-information-area are an address within a block, corresponding to the corresponding information content and corresponding index, and labels of a physical address of register information content of each sub-label-area are high bits of a third quantity number of terms of the corresponding physical address. After failure signals are generated by the comparison circuit, under the control of a main control unit of a processor, to-be-read information are acquired by the transit temporary register through the register, and the to-be-read information are transmitted to a processor pipeline. By the aid of the caching system and the cache accessing method, low power consumption is guaranteed, and accessing rate of the cache is improved.

Description

technical field [0001] The invention relates to the technical field of information cache, in particular to a cache system and a cache access method. Background technique [0002] Due to the large gap between the speed at which the processor executes instructions and the speed at which the processor accesses the main memory, it will affect the processing speed of electronic equipment. Therefore, in order to solve this problem, a cache with relatively large power consumption and fast access speed is generally used for temporary storage. Instructions and data that the processor needs to access at the current moment. Among them, when the instruction or data required by the processor is stored in the cache, it is a hit, and the processor can directly obtain it from the cache; when there is no instruction or data currently required in the cache, the cache will fail once, and the processor The pipeline is suspended, and the processor pipeline continues to execute after the corresp...

AI Technical Summary

Problems solved by technology

[0006] Among them, compared with method 1 and method 2, method 1 takes a long time, but the power consumption is low; while method 2 takes a short time, but because it needs to read 4-way tags and instructions at the same time, the power consumption is quite large

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