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Multi-core processor and data access method

A multi-core processor and data access technology, applied in the computer field, can solve problems such as the inability to guarantee the performance of multi-core processors, and achieve the effect of resolving conflicts and ensuring relatively fixed

Active Publication Date: 2013-05-08
浙江杭海新城控股集团有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The embodiment of the present invention provides a multi-core processor and a data access method, which are used to solve the problem in the prior art that the performance of the multi-core processor cannot be guaranteed due to conflicts generated by the collaboration of multiple processing cores

Method used

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Embodiment Construction

[0036] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0037] figure 1 It is a schematic structural diagram of a multi-core processor 100 provided by an embodiment of the present invention. Such as figure 1 As shown, the multi-core processor 100 includes: at least two processing cores 101, and a serial coprocessor 103 connected to the at least two processing cores through a bus 102;

[0038] Each p...

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Abstract

The invention provides a multi-core processor and a data access method. The multi-core processor comprises at least two processing cores and serial coprocessors which are connected with the at least two processing cores through a bus. Each processing core is used for reading sharing date access orders, and sending the sharing data access orders to each coprocessor through the bus. The serial coprocessor is used for carrying out serialization to all sharing data access orders received through the bus, and sequentially accessing sharing data through a local L1 buffer according to each serialized sharing data access order. When a plurality of processing cores are in cooperation, namely the plurality of processing cores simultaneously access the same sharing data, due to the facts that the sharing data respectively points to each serial coprocessor, and the serial coprocessors can serialize all the received sharing data access orders through the bus, conflict problems are solved, and then relative fixation of cooperative time is ensured.

Description

technical field [0001] The embodiment of the present invention relates to computer technology, in particular to a multi-core processor and a data access method. Background technique [0002] Under the current multi-core processor (also called multi-core CPU), the cache (cache) is divided into first level (referred to as L1), second level (second level, referred to as L2), third level (third level, referred to as L3) and so on. Level, the collaborative operation of multiple processor cores (Core), the key is to ensure the integrity and consistency of the L1cache of each processing core. [0003] When the number of processing cores is small, the overhead of the integrity and consistency of private caches between multiple processing cores can still be accepted, but as the number of cores increases, the overhead becomes larger and larger. To a large extent, it offsets the benefits brought about by the increase in the number of cores. For example, when multiple processing cores...

Claims

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Application Information

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IPC IPC(8): G06F13/362G06F15/167
Inventor 高秋明
Owner 浙江杭海新城控股集团有限公司
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