First-stage circuit structure of pipelined analog-to-digital converter
A technology of analog-to-digital converters and digital-to-analog converters, which is applied in the direction of analog-to-digital converters, can solve the problems of system series reduction and high power consumption, and achieve low static power consumption, optimized quantization range, and optimized bias circuits. and the effect of the continuous type common-mode feedback circuit
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[0025] The present invention will be further described in detail below in combination with specific embodiments.
[0026] Such as figure 1 As shown, the first-stage circuit structure of a pipelined analog-to-digital converter in the present invention includes a 4-bit full parallel analog-to-digital converter (FLASH ADC), an encoding circuit and a remainder gain digital-to-analog converter (MDAC) assembly. The present invention adopts The two-phase non-overlapping clock is divided into a sampling clock and a holding clock. The input voltage is sampled during the sampling phase, and the residual voltage is amplified during the holding phase.
[0027] figure 2 It shows the structure of the 4-bit all-parallel analog-to-digital converter (FLASH ADC) in the present invention, which also works under two-phase non-overlapping clocks. The 4-bit full-parallel analog-to-digital converter (FLASH ADC) described in the present invention uses 16 comparators to divide the quantization rang...
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