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Elastic buffer structure and method applied to universal serial bus 3.0 (USB 3.0)

An elastic buffer and signal technology, which is applied in the direction of instrumentation, electrical digital data processing, etc., can solve the problem of elastic buffer without USB3.0 physical layer, and achieve the effect of avoiding glitches and instability

Active Publication Date: 2012-10-03
无锡华大国奇科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, under the USB3.0 protocol, there is no elastic buffer suitable for the USB3.0 physical layer

Method used

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  • Elastic buffer structure and method applied to universal serial bus 3.0 (USB 3.0)
  • Elastic buffer structure and method applied to universal serial bus 3.0 (USB 3.0)
  • Elastic buffer structure and method applied to universal serial bus 3.0 (USB 3.0)

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Embodiment 1

[0042] The following is the principle of elastic buffering, taking 40 bits as an example, no matter 10 bits, 20 bits or 40 bits, the principle is the same.

[0043] The principle of elastic cushioning:

[0044] The elastic buffer is essentially an asynchronous FIFO. The write clock is the receive clock, the read clock is the system clock, the data bit width is 40 bits, and the FIFO depth is 16. When the symbol lock is valid, write to the FIFO in the receive clock domain 8 data from the serial-to-parallel converter. When the read and write clocks are at the same speed, there are 8 valid data in the FIFO, which is maintained at a half-full state.

[0045] When the read clock is faster than the write clock, more data is read than written. After a period of time, the number of data in the FIFO is less than 8, and may even be read empty. Such as figure 2 As shown, when SKP appears in the input 40-bit data, the valid data in FIFO is 4, which is 4 less than normal. At this point...

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PUM

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Abstract

The invention discloses an elastic buffer structure and a method applied to universal serial bus 3.0 (USB 3.0). The elastic buffer structure comprises an input check module, a binary code and Gray code read-write pointer generation module, a synchronization module, a read-write control module, a threshold value monitoring module and an output control module. According to the protocol requirement of the USB 3.0, by means of the analysis of an action mechanism of elastic buffer, asynchronous first in first out (FIFO) which has innovative functions of writing pointer shield, point jumping, breakpoint saving and handshake, output control and the like is used for designing the elastic buffer, and the purpose of clock frequency compensation is well achieved; and according to the designed elastic buffer, parallel 40-bit data are used, the read-write clock frequency can reach 125 MHz.

Description

technical field [0001] The invention relates to an elastic buffer structure applied to USB3.0. Background technique [0002] Universal Serial Bus 3.0 (Universal Serial Bus 3.0, USB3.0) is a standard announced by Intel, Microsoft, NEC and other companies in November 2008. USB is a new interface technology applied in PC field in recent years. Compared with USB2.0, USB3.0 is still a high-speed, serial, and source-synchronous transmission protocol. The serial data is sent in the form of a differential pair at the sending end, and the serial data and clock are recovered from the serial data by using a clock and data recovery circuit (Clock and Data Recovery, CDR) at the receiving end. Since the transmitting and receiving ends of USB3.0 support independent reference clock sources, the clock frequency recovered by the receiving end is different from its local clock frequency. In order to compensate for the frequency difference between the two clocks, an elastic buffer (Elastic b...

Claims

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Application Information

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IPC IPC(8): G06F13/40G06F13/42
Inventor 朱小明
Owner 无锡华大国奇科技有限公司
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