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Charge-trapping type gate stack and storage unit

A charge trapping and storage cell technology, applied in electrical components, circuits, semiconductor devices, etc., can solve the problems of poor data retention characteristics of storage cells and poor charge binding ability of the storage layer, so as to improve the data retention characteristics and benefit a wide range of applications. The effect of application and device performance optimization

Inactive Publication Date: 2012-09-05
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

In the process of realizing the present invention, the inventor realized that the prior art charge-trapping gate stack has the following defects: the storage layer has a poor ability to bind charges, resulting in poor data retention characteristics of the storage unit

Method used

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  • Charge-trapping type gate stack and storage unit
  • Charge-trapping type gate stack and storage unit
  • Charge-trapping type gate stack and storage unit

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Embodiment Construction

[0029] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0030] In an exemplary embodiment of the present invention, a charge trapping gate stack is provided. The gate stack includes from bottom to top: a tunneling layer, a storage layer and a blocking layer. Wherein, the storage layer is formed by stacking at least three dielectric sublayers, the at least three dielectric sublayers include at least two storage medium sublayers and energy band modulation medium sublayers sandwiched between the storage medium sublayers, the energy band modulation The dielectric sublayer is used to change the charge distribution in the storage layer. Wherein, the above-mentioned change of charge distribution in the storage layer mainly means that the charges are mainly confined in the storage la...

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Abstract

The invention discloses a charge-trapping type gate stack and a storage unit. The gate stack is formed by stacking a tunneling layer, a storage layer and a blocking layer from bottom to top, wherein the storage layer is formed by stacking at least three medium sub-layers including at least two storage medium sub-layers and at least one modulation medium sub-layer sandwiched between the storage medium sub-layers, and the modulation medium sub-layer is used for changing the charge distribution in the storage layer so as to reduce charges close to the blocking layer and gather the charges in the storage layer. According to the invention, through effectively controlling the charge distribution in the storage layer, the data retention property of the storage layer of the gate stack for the charge constraint capacity can be improved, and high-reliability operation for a device can be realized. In addition, through introducing a modulation structure of the storage layer, device performances such as the programming efficiency, the operation voltage of a charge-trapping type nonvolatile memory device are optimized.

Description

technical field [0001] The invention relates to the technical field of memory in the microelectronics industry, in particular to a charge-trapping gate stack and a memory unit. Background technique [0002] The current microelectronics products are mainly divided into two categories: logic devices and storage devices, and storage devices are needed in almost all electronic products today, so storage devices occupy a very important position in the field of microelectronics. Storage devices can generally be classified into volatile memories and non-volatile memories. The main feature of non-volatile memory is the ability to retain stored information for a long period of time without power on. It not only has the characteristics of read-only memory (ROM), but also has high access speed, and is easy to erase and rewrite, and consumes less power. With the demand for large-capacity and low-power storage in multimedia applications and mobile communications, the market share of no...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/423H01L29/792
Inventor 霍宗亮朱晨昕刘明李冬梅张满红王琴刘璟
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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