PCB (printed circuit board) packaging architecture method

A packaging library and mounting hole technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve the problems of prolonging the design cycle, increasing the design workload, increasing the complexity of PCB design and error rework rate, etc., to achieve Reduce duplication of work, facilitate layout and wiring design, reduce the effect of error rate and rework rate

Inactive Publication Date: 2012-08-15
NAT UNIV OF DEFENSE TECH
View PDF4 Cites 13 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The traditional method mentioned above greatly increases the complexity and error rework rate in PCB design, and also greatly increases the design workload and prolongs the PCB design cycle.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • PCB (printed circuit board) packaging architecture method
  • PCB (printed circuit board) packaging architecture method
  • PCB (printed circuit board) packaging architecture method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0037] Such as figure 1 As shown, the PCB packaging architecture method of the present embodiment includes the following steps:

[0038] 1. If image 3 As shown, a logic symbol is established in the logic symbol library, which includes the pins and mounting holes of the component and its auxiliary components. Among them, the auxiliary components of the components include: heat dissipation components, positioning components and structural firmware. The aforementioned logic notation (see image 3 ) is in the case of figure 2 The traditional logic symbol of the component is made by adding the logic of the pins and mounting holes of the auxiliary component, image 3 Middle A is the logic of mounting holes and positioning holes required for structure and heat dissipation.

[0039] 2. Establish traditional packaging symbols for components (such as Figure 4 shown), and then establish an auxiliary packaging symbol according to the structural characteristics of the auxiliary co...

Embodiment 2

[0044] Such as Figure 6 As shown, the PCB package architecture method of the present invention comprises the following steps:

[0045] 1. Create a traditional logic symbol of a component in the logic symbol library (such as Figure 7 shown); create a new auxiliary logic symbol required by the auxiliary component of the component (such as Figure 8 As shown), the auxiliary logic symbols include the logic of the pins and mounting holes of the auxiliary components of the component, and the traditional logic symbols are automatically associated with the auxiliary logic symbols. Among them, the auxiliary components of the components include: heat dissipation components, positioning components and structural firmware, etc.

[0046]2. Establish traditional packaging symbols for components (such as Figure 9 shown), and then create an auxiliary packaging symbol according to the structural characteristics of the auxiliary components of the component (such as Figure 10 shown), the...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a PCB (printed circuit board) packaging architecture method, which includes the steps: setting up a logic symbol in a logic symbol library, wherein the logic symbol comprises pins and mounting holes of an element and an auxiliary component thereof; setting up a traditional packaging symbol of the element, setting up an auxiliary packaging symbol according to the structural characteristics of the auxiliary component of the element, and combining the traditional packaging symbol and the auxiliary packaging symbol into integrated package or associating the traditional packaging symbol with the auxiliary packaging symbol into a combined packaging symbol; and mapping the logic symbol and the corresponding integrated package or combined package, and storing the integrated package or combined package into a PCB packaging bank for integral calling or combination calling. Using the PCB packaging architecture method can improve operating efficiency, reduce repetitive operations in PCB design and improve PCB design accuracy.

Description

technical field [0001] The invention relates to PCB (printed board) design, in particular to a method for PCB package structure. Background technique [0002] Integrated circuit packaging not only plays the role of connecting the bonding points in the integrated circuit chip with the external circuit, but also provides a stable and reliable working environment for the integrated circuit chip, and protects the integrated circuit chip mechanically or environmentally, so that the integrated circuit The chip can perform normal functions, and its high stability and reliability are guaranteed. With the continuous development of wafer technology, the size of transistors continues to decrease. According to Moore's Law, the number of transistors that can be accommodated on an integrated circuit will double every 18 months, and the performance will also double; Therefore, the complexity of integrated circuit packaging is also constantly increasing, and the packaging form has also dev...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F17/50
Inventor 曹跃胜陈超肖立权李晋文胡军陈旭罗煜峰蒋句平李元山田宝华宋飞
Owner NAT UNIV OF DEFENSE TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap