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Periodic wear balancing method and memory management method of phase change memory

A technology of phase change memory and wear leveling, applied in the computer field, can solve the problem of limited write times of storage units and achieve the effect of enhancing reliability

Active Publication Date: 2012-06-13
TSINGHUA UNIV
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  • Abstract
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  • Application Information

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Problems solved by technology

However, PRAM has an obvious disadvantage, that is, the number of writes to its storage unit is limited. The current technology can support PRAM storage unit to be repeatedly written for 10 times. 8 Second-rate

Method used

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  • Periodic wear balancing method and memory management method of phase change memory
  • Periodic wear balancing method and memory management method of phase change memory
  • Periodic wear balancing method and memory management method of phase change memory

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Embodiment Construction

[0032] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples serve to illustrate the present invention, but do not limit the scope of the present invention.

[0033] Such as figure 1 As shown, the phase change memory periodical wear leveling method of the present invention includes the steps: S1, maintaining a global write count counter Access_Counter for the physical memory of the phase change memory, which contains the information of each physical page frame in the phase change memory Write count counter; the write count data is stored in a specific area of ​​the phase change memory. When the system is restarted, the write count data of the counter can still be read; S2, add two doubly linked lists of used_list and threshold_list for each sub-table; used_list The free blocks that have been allocated are saved in the threshold_list, and the f...

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Abstract

The invention relates to a periodic wear balancing method and a memory management method of a phase change memory. The method comprises the steps of: S1, maintaining a counter for overall writing times for a physical memory of the phase change memory; S2, increasing used-list and threshold-list doubly linked lists to each sublist, and simultaneously increasing an overall bad-list to maintain the memory region which can not be allocated; S3, when the data is written to a physical memory page, synchronously updating the counter for the overall writing times and a counter for accumulative writing times of a memory block during current allocation; S4, setting a writing threshold, after the writing times of the memory block during the current allocution exceeds the writing threshold, releasing the memory block and placing the memory block in the threshold-list of the corresponding sublist, then applying to allocate a memory block with identical capacity, and copying the data content from an old memory block to the new allocated memory block; and S5, when the overall writing times of the physical memory page exceeds the life limit of a phase change storage unit, and placing the memory page in the bad-list so as not to allocate for ever.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a phase change memory periodic wear leveling method and a memory management method thereof. Background technique [0002] A phase-change random access memory (PRAM) technology based on phase-change memory (Phase-Change Memory) is considered as a candidate technology to replace DRAM, which has the characteristics of high density, non-volatility, and low power consumption. Compared with DRAM, PRAM can store more content in a smaller size; in terms of speed, the read speed of PRAM is slightly slower than DRAM, and the write speed is dozens of times slower than DRAM, but the overall energy consumption is much lower than DRAM. However, PRAM has an obvious disadvantage, that is, the number of writes to its storage unit is limited. The current technology can support PRAM storage unit to be repeatedly written for 10 times. 8 Second-rate. In response to this problem, researchers have ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/06
Inventor 胡事民赵鹏
Owner TSINGHUA UNIV
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