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Methods and apparatus to predict non-execution of conditional non-branching instructions

An instruction execution, conditional technology, applied in the field of processors that support conditional non-branch instructions, to solve problems such as performance degradation

Active Publication Date: 2012-05-30
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Additionally, conditional instructions may exist in software loops where the conditional resolution nature of the conditional instructions occurs in a similar fashion for each iteration of the loop, which can cause significant performance degradation

Method used

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  • Methods and apparatus to predict non-execution of conditional non-branching instructions
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  • Methods and apparatus to predict non-execution of conditional non-branching instructions

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Embodiment Construction

[0017] The detailed description, set forth below in conjunction with the accompanying drawings, is intended as a description of various exemplary embodiments of the invention and is not intended to represent the only embodiments in which the invention may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring the concepts of the invention.

[0018] figure 1 An exemplary wireless communication system 100 is described in which embodiments of the present invention may be advantageously used. For illustrative purposes, figure 1 Three remote units 120 , 130 and 150 and two base stations 140 are shown. It will be appreciated that conventional wireless com...

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Abstract

Efficient techniques are described for not executing an issued conditional non-branch instruction. A conditional non-branch instruction is identified as being eligible for a prediction, the prediction indicating that the eligible conditional non-branch (ECNB) instruction would not execute. The ECNB instruction executes as a no operation (NOP) instruction in response to the prediction that the ECNB instruction would not execute. A source operand required for the ECNB instruction to execute is not fetched in response to the prediction to not execute.

Description

technical field [0001] The present invention relates generally to the field of processors, and in particular to processors supporting conditional non-branch instructions. Background technique [0002] Many portable products such as cell phones, laptop computers, personal data assistants (PDAs), etc. utilize processing systems that execute programs such as communication and multimedia programs. Processing systems for such products may include multiple processors, complex memory systems for storing instructions and data, controllers, peripherals such as communication interfaces, and fixed function logic blocks configured on, for example, a single chip. At the same time, portable products have limited energy sources in the form of batteries, which are often required to support high performance operations by processing systems. To increase battery life, these operations need to be performed as efficiently as possible. Many personal computers are also being developed with effic...

Claims

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Application Information

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IPC IPC(8): G06F9/32G06F9/38
CPCG06F9/3844G06F9/30072G06F9/3832G06F9/3861G06F9/38G06F9/32
Inventor 布莱恩·M·斯坦普尔詹姆斯·N·迪芬德尔弗尔托马斯·A·萨托里乌斯戴维·J·曼德扎克罗德尼·W·史密斯
Owner QUALCOMM INC
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