Gate drive circuit unit, gate drive circuit and display device

A technology of gate drive circuit and holding circuit, which is applied in the field of gate drive circuit and display device, can solve the problem of strict limitation of drive circuit area, and achieve the effects of saving area, simplifying structure, and utilizing area

Active Publication Date: 2012-04-04
PEKING UNIV SHENZHEN GRADUATE SCHOOL +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Especially in small and medium-sized display panels, the limitation of driving circuit area is more stringent

Method used

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  • Gate drive circuit unit, gate drive circuit and display device
  • Gate drive circuit unit, gate drive circuit and display device
  • Gate drive circuit unit, gate drive circuit and display device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0044] see figure 1 as shown, figure 1 As a gate driving circuit unit provided by an embodiment of the present invention, the first embodiment of the present invention starts from delaying the input signal of VI2. When the signal output by the output terminal of the circuit unit is transmitted to the subsequent circuit unit through the grid line load of the pixel area in the panel, the input signal of the second signal input terminal VI2 of the latter circuit unit is higher than that of the output terminal VO of the previous circuit unit. The output signal has a time delay, which can delay the release of the Q-point charge. The gate drive circuit unit includes:

[0045] Two signal input terminals, the first signal input terminal VI1 and the second signal input terminal VI2;

[0046] Two clock signal input terminals, the first clock signal input terminal VA and the second clock signal input terminal VB, the two clock signal input terminals input two columns of square wave cl...

Embodiment 2

[0087] Please refer to Image 6 , Image 6 It is a schematic diagram of the gate driving circuit unit of the second embodiment of the present invention. Compared with the gate drive circuit unit circuit of the first embodiment of the present invention, the unit circuit of the second embodiment adjusts the structure of the drive part (Drive): a third clock signal input terminal VC is added, and the transistor in the first embodiment is M3 is coupled to the source of the common ground terminal VSS, and is changed to be coupled to the third clock signal input terminal VC. The clock signal input by the third clock signal input terminal VC has twice the frequency of the signals input by the first clock signal input terminal VA and the second clock signal input terminal VB, that is, the period of the third clock signal is the period of the first clock signal 1 / 2 of. The purpose of this embodiment is still to delay the drop of the potential of the node Q of the unit circuit, and u...

no. 1 example 1

[0088] Please refer to Figure 7 , a timing diagram of the gate driving circuit unit according to the second embodiment of the present invention. Like the first embodiment, the working sequence of the unit circuit of the gate driving circuit of the second embodiment is also divided into two major stages: a driving stage (Driving) and a holding stage (Holding). Likewise, the two major stages can be subdivided into five smaller stages. To avoid repetition, only the working principle of the t3 stage of the driving stage (Driving) will be described in detail. In the stage t3, a low-level signal is input to the first clock signal input terminal VA of the unit circuit, and a high-level signal is input to the second clock signal input terminal VB. The second signal input terminal VI2 inputs a high-level signal to turn on the transistor M3, and before the input signal of the third clock signal input terminal VC jumps from high level to low level, the potential of node Q remains at a...

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PUM

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Abstract

The invention discloses a gate drive circuit unit, a gate drive circuit and a display device with the gate drive circuit. The gate drive circuit comprises two signal input ends, a signal output end, a first clock signal input end and the gate drive circuit unit; and the two signal input ends are used for inputting a first pulse signal and a second pulse signal respectively. When the first clock signal changes into the low level of the next cycle, the second pulse signal comes. The change of the second pulse signal into the low level is later than the change of the first pulse signal into the low level. Compared with the prior art, the embodiment of the invention has the advantages that due to the reduction of the number of transistors in the gate drive circuit unit, the area of the gate drive circuit is saved, the structure of the gate drive circuit is simplified, the area of a panel of the display device is hereby used more effectively, and the gate drive circuit can meet the higher use requirement.

Description

technical field [0001] The invention belongs to the field of electronic display, and in particular relates to a gate drive circuit and a display device with the gate drive circuit. Background technique [0002] A liquid crystal display (Liquid Crystal Display) has the advantages of light weight, thin thickness and low power consumption, and is widely used in the display field. The gate driving circuit is one of the important components of the liquid crystal display device, and is usually mounted on the display device in the form of an external chip (Integrated Circuit, IC). In recent years, integrated gate driving circuits have become a research hotspot in display technology. The so-called integrated gate circuit means that the gate drive circuit is composed of thin film transistors (TFTs), and is manufactured simultaneously with the pixel TFTs in the panel and formed on the display substrate. The display device using the integrated gate drive circuit can not only reduce t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/20
Inventor 张盛东陈韬廖聪维刘晓明戴文君钟德镇简庭宪
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL
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