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Microsoft data access component (MDAC) structure applied to pipeline analogue-to-digital converter

An analog-to-digital converter and pipeline technology, applied in the direction of analog-to-digital converters, can solve the problems of reducing the speed of the analog-to-digital converter, large load capacitance, and reducing the accuracy of the analog-to-digital converter, so as to reduce the charge injection effect and reduce the Effect of small offset and power consumption, and increased settling speed

Inactive Publication Date: 2011-11-23
FUDAN UNIV
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In the traditional multi-bit / stage structure pipelined analog-to-digital converter, MDAC performs margin amplification in the hold phase, so that the closed-loop amplifier composed of the operational amplifier, sampling capacitor, feedback capacitor and closed switch has a small feedback coefficient and The characteristics of large load capacitance, and these two characteristics are not conducive to the improvement of the establishment speed of MDAC, thus limiting the realization of high-speed and high-precision pipeline analog-to-digital converters
[0004] In addition, in the traditional pipeline ADC structure, MDAC only performs margin amplification in the hold phase, and does not work in the sampling phase, so nearly half of the power consumption of the op amp is wasted
In response to this problem, the use of op amp sharing technology can effectively improve the utilization of op amp power consumption and reduce the overall power consumption of the analog-to-digital converter. However, since the op amp works continuously without reset, there are stability problems and memory effects (that is, One sample will continue to retain the parasitic capacitance at the input of the op amp, which will affect the next sample), which reduces the accuracy of the analog-to-digital converter. In addition, some extra switches are added to reduce the speed of the analog-to-digital converter
Another solution is to use switching op amp technology to turn off the op amp to save power consumption when the op amp is not working. However, since the op amp needs a certain amount of time to restart, this technology is not conducive to the speed of the analog-to-digital converter. improve

Method used

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  • Microsoft data access component (MDAC) structure applied to pipeline analogue-to-digital converter
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  • Microsoft data access component (MDAC) structure applied to pipeline analogue-to-digital converter

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Embodiment 1

[0029] Such as figure 1 as shown, figure 1 A structural schematic diagram of a novel MDAC structure suitable for a pipelined analog-to-digital converter provided by the present invention, the structure includes an operational amplifier, a first switched capacitor unit and a second switched capacitor unit. Wherein, both the first switched capacitor unit and the second switched capacitor unit are composed of a sampling capacitor CS, a feedback capacitor CF, a load capacitor CL and switches. In the sampling phase PhiS, the sampling capacitor samples the input signal, while the operational amplifier maintains the voltage on the feedback capacitor to charge and discharge the load capacitor; in the reset phase PhiR, the sampling capacitor is suspended, the input terminal of the operational amplifier is connected to the common mode level Vcomi, and the output The terminal is connected to the common mode level Vcomo, and the voltage on the feedback capacitor is reset; in the transmis...

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Abstract

The invention belongs to the technical field of pipeline analogue-to-digital converters, and relates to a novel Microsoft data access component (MDAC) structure applied to the pipeline analogue-to-digital converter. The MDAC structure comprises an operational amplifier, a first switched capacitor unit and a second switched capacitor unit, wherein each of the first and second switched capacitor units consists of a sampling capacitor CS, a feedback capacitor CF, a load capacitor CL and a switch. In a sampling phase PhiS, the sampling capacitor samples an input signal, and simultaneously the operational amplifier keeps voltage on the feedback capacitor to charge and discharge the load capacitor; in a resetting phase PhiR, the sampling capacitor is suspended, the input end of the operational amplifier is connected with a common mode level Vcomi, the output end of the operational amplifier is connected with a common mode level Vcomo, and the voltage on the feedback capacitor is reset; in a transmission phase PhiT, the operational amplifier performs margin amplification on a sample on the sampling capacitor, and transmits margin voltage; and in a clearing phase PhiC, the two ends of the sampling capacitor are both connected with the common mode level Vcomi, and charges are cleared to prepare for the next sampling. The MDAC structure can reduce the power consumption of the analogue-to-digital converter and increase a conversion rate.

Description

technical field [0001] The invention relates to the technical field of pipeline analog-to-digital converters, in particular to a novel MDAC structure suitable for pipeline analog-to-digital converters. Background technique [0002] Pipeline ADC is a classic structure type of ADC, which can make a good compromise among power consumption, area, speed and precision, so it is widely used. High-precision pipeline analog-to-digital converters often use a multi-bit / stage structure. [0003] In the traditional multi-bit / stage structure pipelined analog-to-digital converter, MDAC performs margin amplification in the hold phase, so that the closed-loop amplifier composed of the operational amplifier, sampling capacitor, feedback capacitor and closed switch has a small feedback coefficient and The characteristics of large load capacitance, and these two characteristics are not conducive to the improvement of the establishment speed of MDAC, thus limiting the realization of high-speed ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/12
Inventor 秦亚杰陈奇辉陆波洪志良
Owner FUDAN UNIV
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