Field programmable gate array (FPGA) logic module debugging and data acquisition method based on PicoBlaze embedded soft core processor

Abstract

The invention provides a field programmable gate array (FPGA) logic module debugging and data acquisition method based on a PicoBlaze embedded soft core processor. The PicoBlaze embedded soft core processor, a universal asynchronous receiver / transmitter (Uart) module, a clock control module and a double-port random access memory (RAM) module are arranged in engineering of a hardware system, and corresponding software is installed on a personal computer (PC); a set of dedicated communication protocol is made, defines a uniform data packet format, is used for standardizing data exchange between the PicoBlaze processor and the PC, has a 8-bit cyclic redundancy check (CRC) function, and ensures communication reliability; and the hardware system on an FPGA is comprehensively debugged and all internal data is acquired and analyzed by sending a command at a PC end.

Description

technical field [0001] The invention mainly relates to the fields of logic circuit verification, debugging, FPGA teaching and the like on the FPGA. In particular, it refers to a method for debugging and data acquisition of logic circuits on FPGA by using embedded soft-core processors. Background technique [0002] The main characteristics of the current hardware design project are: using FPGA as the hardware carrier, using the computer as the design and development tool, and using SoC, IP, etc. as the comprehensive design method. FPGA has become one of the necessary design elements for hardware engineers. [0003] What kind of method is used to verify and debug the logic circuit on FPGA directly affects the efficiency of logic circuit design and SOC system design. The debugging of large-scale design should follow the reverse order of the design concept, and test from the bottom layer, that is, the specific signals inside the logic circuit need to be collected and analyzed....

AI Technical Summary

Problems solved by technology

[0004] The problem to be solved by the present invention is to find a simple and easy way to realize the control and debugging of the complex logic circuit on the FPGA in view of the existing methods for verifying and debugging the complex logic circuit on the FPGA and the teaching mode of the FPGA. The collection and modification of internal signals can effectively improve the efficiency of logic circuit design and SOC system design, and effectively improve the effect of FPGA teaching

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