Method for realizing 3780-point fast Fourier transform/inverse fast Fourier transform (FFT/IFFT) and processor thereof

A processor and algorithm technology, applied in the field of fast Fourier transform processors, can solve problems such as increasing the amount and complexity of algorithm calculations, consuming more resources, etc.

Inactive Publication Date: 2011-10-12
FUZHOU UNIV
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Problems solved by technology

According to the mixed base algorithm, the 3780 points are decomposed as follows: 3780=7*9*3*4*5, where the FFT of points 7, 9, 3, 4, and 5 is calculated by the WFTA algorithm, and the However, the disadvantage is that every two stages of the system need to be mixed in sequence and introduce twiddle factors, which increases the computational load and complexity of the algorithm, resulting in the consumption of more resources in hardware design.

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  • Method for realizing 3780-point fast Fourier transform/inverse fast Fourier transform (FFT/IFFT) and processor thereof
  • Method for realizing 3780-point fast Fourier transform/inverse fast Fourier transform (FFT/IFFT) and processor thereof
  • Method for realizing 3780-point fast Fourier transform/inverse fast Fourier transform (FFT/IFFT) and processor thereof

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[0026] The technical solution involved in the present invention will be described below with a specific implementation example in conjunction with the accompanying drawings.

[0027] The hardware architecture of this FFT / IFFT processor based on the FPGA platform is as follows: figure 2 shown.

[0028] figure 2 It is a hardware system block diagram of the FFT / IFFT processor of the present invention. In this example, a group of data with a length of 3780 points enters the input conjugation module 12 under the synchronous effect of the clock, and is stored in the RAM unit 13 in a cycle according to the real part and the imaginary part. Under the control of the control unit 17, the data is transferred from Read out from the RAM unit 13, enter the WFTA operation unit 14 to perform n-point WFTA calculations, and store them in the corresponding address of the RAM unit 13 after calculation to realize the original address operation. After the 9-point WFTA operation is performed, t...

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Abstract

The invention relates to a method for realizing 3780-point fast Fourier transform / inverse fast Fourier transform (FFT / IFFT) and a processor thereof. The processor consists of a top layer, an intermediate layer and a bottom layer, wherein the top layer resolves 3780-point by using a mixed based number algorithm, the intermediate layer resolves 63-point and 60-point FFT by using a prime factor algorithm, and the bottom layer complete 7-point, 9-point, 3-point, 4-point and 5-point FFT calculation by using a winograd fourier transform algorithm (WFTA) algorithm. The method realizes 3780-point FFT by combining the mixed base number algorithm, the prime factor algorithm and the WFTA algorithm, avoids errors caused by calculating 4096-point by using an interpolation method, and reduces rotation factors and a chaotic unit in the mixed base number algorithm. Furthermore, an index structure completed by a multiplex memory in the design has a simple circuit, is easy to realize, and can save chip resources.

Description

technical field [0001] The invention relates to a Fast Fourier Transform (FFT) processor, in particular to a modulation system for digital multiplex television, high-definition television fixed and mobile broadcasting services used in China's terrestrial transmission. Background technique [0002] In August 2006, the National Standards Management Committee announced the Chinese digital TV terrestrial broadcast transmission system standard GB20600-2006 "Digital TV terrestrial broadcast transmission system frame structure, channel coding and modulation", namely the DMB-TH standard. The standard adopts time-domain synchronous orthogonal frequency division multiplexing (TDS-OFDM) to modulate and demodulate the signal respectively, and the 3780-point subcarrier number designed by comprehensive consideration of various factors is also different from that in the DVB-T standard. The radix-2 or radix-4 butterfly algorithm has certain originality and novelty in practical applications....

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Application Information

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IPC IPC(8): G06F17/14
Inventor 苏凯雄庄敏敏程钢杨秀芝
Owner FUZHOU UNIV
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